MOS 3.5, DFS and ADFS and inter-ROM calls.

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Coeus
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MOS 3.5, DFS and ADFS and inter-ROM calls.

Post by Coeus » Fri Jul 12, 2019 12:09 pm

On http://mdfs.net/Info/Comp/BBC/SROMs/MegaROM.htm it mentions that for MOS 3.50 "DFS and ADFS share code and must be in ROM slots four places apart so they can be switched between with EOR #4". Has anyone analysed exactly what is where?

Looking at these two ROMs I can see what looks like it may be the mechanism. From the ADFS ROM there is this subroutine at BFC5:

Code: Select all

    BFC5: 48          PHA         
    BFC6: 48          PHA         
    BFC7: 08          PHP         
    BFC8: 48          PHA         
    BFC9: DA          PHX         
    BFCA: A5 B0       LDA B0      
    BFCC: 48          PHA         
    BFCD: A5 B1       LDA B1      
    BFCF: 48          PHA         
    BFD0: BA          TSX         
    BFD1: BD 0A 01    LDA 010A,X  
    BFD4: 85 B0       STA B0      
    BFD6: BD 0B 01    LDA 010B,X  
    BFD9: 85 B1       STA B1      
    BFDB: 20 B6 BF    JSR BFB6    
    BFDE: 9D 06 01    STA 0106,X  
    BFE1: 20 B6 BF    JSR BFB6    
    BFE4: 9D 07 01    STA 0107,X  
    BFE7: 68          PLA         
    BFE8: 85 B1       STA B1      
    BFEA: 68          PLA         
    BFEB: 85 B0       STA B0      
    BFED: FA          PLX         
    BFEE: A5 F4       LDA F4      
    BFF0: 89 08       BIT #08     
    BFF2: F0 02       BEQ BFF6    
    BFF4: 49 05       EOR #05     
    BFF6: 49 01       EOR #01     
    BFF8: 85 F4       STA F4      
    BFFA: 8D 30 FE    STA FE30    
    BFFD: 68          PLA         
    BFFE: 28          PLP         
    BFFF: 60          RTS
and, as you'd expect, the DFS ROM has the same subroutine at the same place so that upon doing the STA FE30 the next instructions are still PLA, PLP, RTS. The DFS version is the full routine not just a stub, so that means transfer can happen in either direction.

Interestingly the BIT and EOR sequence suggests that if these ROMs are in the lower part of the sideways ROM space, for example the sideways RAM banks or cartridge slots, they should be adjacent rather than having the same spacing as in ROM. Perhaps this is to enable newer versions to be loaded into sideways RAM for testing.
Last edited by Coeus on Fri Jul 12, 2019 12:42 pm, edited 2 times in total.

Coeus
Posts: 1313
Joined: Mon Jul 25, 2016 11:05 am
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Re: MOS 3.5, DFS and ADFS and inter-ROM calls.

Post by Coeus » Fri Jul 12, 2019 12:51 pm

There is a little bit more to this code. Calls seem to go indirectly via BFAF:

Code: Select all

    BFAF: 20 C5 BF    JSR BFC5    
    BFB2: 08          PHP         
    BFB3: 48          PHA         
    BFB4: 80 38       BRA BFEE    
In the calling ROM this sets the return address to be the immediately following code in the called ROM which is what flips ROMs back to the caller. These inter-ROM calls are initiated as follows:

Code: Select all

    9F48: 20 AF BF    JSR BFAF    
    9F4B: FF          ---         
    9F4C: B7          ---         
    9F4D: 20 6D AA    JSR AA6D    
So the two bytes after the JSR BFAF are the address in the other ROM to call.

Coeus
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Joined: Mon Jul 25, 2016 11:05 am
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Re: MOS 3.5, DFS and ADFS and inter-ROM calls.

Post by Coeus » Fri Jul 12, 2019 2:24 pm

So these seems to be the call between the two. ADFS calls DFS:

Code: Select all

ADFS  DFS
80F0  B89E
8B2A  B8AF
9F48  B7FF
AE5E  B805
AFBD  B809
BE14  B8CA
DFS calls ADFS:

Code: Select all

DFS   ADFS
B919  92CC
B926  97EB
BB0A  801F
BB55  9DE8
BF6A  8039

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