Looking at these two ROMs I can see what looks like it may be the mechanism. From the ADFS ROM there is this subroutine at BFC5:
Code: Select all
BFC5: 48 PHA BFC6: 48 PHA BFC7: 08 PHP BFC8: 48 PHA BFC9: DA PHX BFCA: A5 B0 LDA B0 BFCC: 48 PHA BFCD: A5 B1 LDA B1 BFCF: 48 PHA BFD0: BA TSX BFD1: BD 0A 01 LDA 010A,X BFD4: 85 B0 STA B0 BFD6: BD 0B 01 LDA 010B,X BFD9: 85 B1 STA B1 BFDB: 20 B6 BF JSR BFB6 BFDE: 9D 06 01 STA 0106,X BFE1: 20 B6 BF JSR BFB6 BFE4: 9D 07 01 STA 0107,X BFE7: 68 PLA BFE8: 85 B1 STA B1 BFEA: 68 PLA BFEB: 85 B0 STA B0 BFED: FA PLX BFEE: A5 F4 LDA F4 BFF0: 89 08 BIT #08 BFF2: F0 02 BEQ BFF6 BFF4: 49 05 EOR #05 BFF6: 49 01 EOR #01 BFF8: 85 F4 STA F4 BFFA: 8D 30 FE STA FE30 BFFD: 68 PLA BFFE: 28 PLP BFFF: 60 RTS
Interestingly the BIT and EOR sequence suggests that if these ROMs are in the lower part of the sideways ROM space, for example the sideways RAM banks or cartridge slots, they should be adjacent rather than having the same spacing as in ROM. Perhaps this is to enable newer versions to be loaded into sideways RAM for testing.