Yes, that would make sense as there's already a 0001xxxx on the left hand side (and there isn't a 0000xxxx). It didn't make any difference to determining the opcode groups, thankfully!
8271 disc controller de-cap and craziness -- do not try this at home!
- Rich Talbot-Watkins
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
- Diminished
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I see!Rich Talbot-Watkins wrote: ↑Thu Sep 10, 2020 5:15 pmRegister banks are selected by opcodes $00...$0F. Each bank is 8 registers, so opcode $02 would suggest a base register of $10.
I was really hoping for something like this. Are they writeable, then? Can you just bypass the byte processor, and program the bit processor directly? Because that would be rad.Now I said there were 32 internal registers, but this is literally only half the story! Because if you select register bank 4 (a base of $20), you get access to I/O ports which are mapped to registers $20...$27 (and mirrored every 8...): this was not just an abstraction in the read/write special register command, but is actually presented like this at the MPU level. Not only are the drive control ports here, but the bit processor functionality is exposed here too, for performing the actual bit serialization tasks, all appearing like simple basic registers!
So the register banks map to the segments? I know the patent alludes to a mechanism something like this.The register banks (opcodes $00...$0F) have a second, perhaps primary, use: they specify the 4 bit segment index used as part of the key which jumping to one of the preset entry points. We don't fully understand all the mechanisms which exist for this, but one which is well understood is the opcode $EE which jumps to the entry point keyed by (2, RB, *) where 2 is the 2-bit ID, RB is the 4-bit selected register bank, and * is a "don't care" in this case.
I'm a little confused by which way around you're naming routines and segments. In your model, does each segment contain multiple routines, or does each routine contain multiple segments? I thought the patent named it the latter way round (i.e. one routine has multiple segments) ... but it seems weird to have an entrypoint that is wildcarded on routine ID, but requires a specific segment ID. Meh.
- Rich Talbot-Watkins
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Externally you could "write special register" and hit the bit processor directly, yes; whether the latency involved in that round trip would let you do anything sensible is another question! But first we need to understand what all these various registers actually do!Diminished wrote: ↑Thu Sep 10, 2020 5:48 pmI was really hoping for something like this. Are they writeable, then? Can you just bypass the byte processor, and program the bit processor directly? Because that would be rad.
The byte processor ROM liberally performs operations on those registers as if they were any other. Stuff like AND I0, #imm (which is doing the equivalent of a read-modify-write in one cycle!).
There's an opcode $EC, which is used by the command dispatcher. It takes the current register bank, and the command ID in the accumulator and jumps to (0, RB, A) (which I have documented as (2-bit page, segment, routine)). In this case it makes sense.Diminished wrote: ↑Thu Sep 10, 2020 5:48 pmSo the register banks map to the segments? I know the patent alludes to a mechanism something like this.
I'm a little confused by which way around you're naming routines and segments. In your model, does each segment contain multiple routines, or does each routine contain multiple segments?
Then there's an opcode $EE ,which is used to jump to any entry point anywhere in the ROM, which goes to (2, RB, -). In this case the RB ("segment") is actually more kind of providing the routine.
And then there's the event/task system. We're only just starting to understand this, and it's this which makes me think that segments and routines are the wrong way round. Each event (of which there are 8 possible ones) corresponds to a seemingly hardcoded (page, segment). There are a set of registers into which you put the id of the routine you want it to jump to when the event occurs. On top of this, the opcodes $10-$1F seem to allow you to busy wait for the next event and then jump to routine x of $1x in the current task. This makes more sense with segments and routines the other way round.
Honestly, I haven't changed it in the doc so far for fear of further confusion, but we'll try and get the names sorted out once this stuff is better understood.
- Diminished
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Fascinating.
Might be better just to forget the patent and pick new names.
Might be better just to forget the patent and pick new names.
- Diminished
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
In less groundbreaking news, I appear now to have code which can successfully decode the inputs to the address PLA from a marked-up image of the bits, and handle the don't-cares gracefully (slightly more annoying than I expected), so I'm set up for if and when we get a better 8273 pic. The good news is that with respect to the 8271 there don't appear to have been any mistakes in what guesser and me produced last time:
I'll do the output table in a bit -- should be easier than this.
Edit: checked the PC table -- again, the existing readout is fine, and I have another script all ready for the 8273.
Code: Select all
$ php -f 8273/interpret_pc_table_raw_bits.php
row 0: (0, 3, 4)
row 1: (0, 2, 13)
row 2: (0, 2, 4)
row 3: (0, 2, 5)
row 4: (0, 2, 6)
row 5: (0, 2, 7)
row 6: (0, 2, 2)
row 7: (0, 2, 3)
row 8: (0, 2, 8)
row 9: (0, 2, 10)
row 10: (0, 2, 0)
row 11: (0, 2, 1)
row 12: (0, 2, 11)
row 13: (0, 2, 14)
row 14: (0, 2, 15)
row 15: (0, 1, 0)
row 16: (0, 1, 1)
row 17: (0, 1, 2)
row 18: (0, 1, 3)
row 19: (0, 1, 4)
row 20: (0, 1, 5)
row 21: (0, 1, 6)
row 22: (0, 1, 7)
row 23: (0, 1, 8)
row 24: (0, 1, 9)
row 25: (0, 1, 10)
row 26: (0, 1, 11)
row 27: (1, 1, 8) -> (1, 1, 15)
row 28: (1, 1, 0) -> (1, 1, 7)
row 29: (1, 2, 8)
row 30: (1, 2, 3)
row 31: (1, 2, 5)
row 32: (1, 2, 10)
row 33: (1, 2, 11)
row 34: (1, 3, 0), (1, 3, 8)
row 35: (1, 3, 1), (1, 3, 9)
row 36: (1, 3, 2), (1, 3, 10)
row 37: (1, 3, 3), (1, 3, 11)
row 38: (1, 3, 4), (1, 3, 12)
row 39: (1, 3, 5), (1, 3, 13)
row 40: (2, 0, 0) -> (2, 0, 15)
row 41: (2, 1, 0) -> (2, 1, 15)
row 42: (2, 2, 0) -> (2, 2, 15)
row 43: (2, 3, 0) -> (2, 3, 15)
row 44: (2, 4, 0) -> (2, 4, 15)
row 45: (2, 5, 0) -> (2, 5, 15)
row 46: (2, 6, 0) -> (2, 6, 15)
row 47: (2, 7, 0) -> (2, 7, 15)
row 48: (2, 8, 0) -> (2, 8, 15)
row 49: (2, 9, 0) -> (2, 9, 15)
row 50: (2, 10, 0) -> (2, 10, 15)
row 51: (2, 11, 0) -> (2, 11, 15)
row 52: (2, 12, 0) -> (2, 12, 15)
row 53: (2, 13, 0) -> (2, 13, 15)
row 54: (2, 14, 0) -> (2, 14, 15)
row 55: (2, 15, 0) -> (2, 15, 15)
row 56: (3, 2, 0) -> (3, 2, 15)
row 57: (3, 3, 0) -> (3, 3, 15)
row 58: (3, 8, 0) -> (3, 8, 15)
row 59: (3, 13, 0) -> (3, 13, 15)
row 60: (3, 9, 0), (3, 9, 2), (3, 9, 8), (3, 9, 10)
row 61: (3, 9, 1), (3, 9, 3), (3, 9, 9), (3, 9, 11)
row 62: (3, 9, 4) -> (3, 9, 7), (3, 9, 12) -> (3, 9, 15)
row 63: (3, 4, 0)
row 64: (3, 4, 1)
row 65: (3, 4, 2)
row 66: (3, 4, 3)
row 67: (3, 4, 4)
row 68: (3, 4, 5)
row 69: (3, 4, 8)
row 70: (3, 5, 0)
row 71: (3, 5, 1)
row 72: (3, 5, 5)
row 73: (3, 5, 10) -> (3, 5, 11)
row 74: (3, 7, 0)
row 75: (3, 7, 1)
row 76: (3, 7, 3)
row 77: (3, 7, 5)
row 78: (3, 7, 6)
row 79: (3, 7, 8)
row 80: (3, 11, 0) -> (3, 11, 15)
row 81: (3, 12, 0) -> (3, 12, 15)
Edit: checked the PC table -- again, the existing readout is fine, and I have another script all ready for the 8273.
- Diminished
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
This should be a pretty accurate rendition of the 8273's entrypoints -- the output table was much easier to read than the input one.
If anyone wants the (very provisional) ROM image (since I only posted it in unhelpful hex before), here you go:
(edit: updated with six bytes fixed, see here)
I'll try to check my markup of the bits at some point, but there are thousands of them and I'm feeling indolent. Maybe we'll get another 8273 snap this weekend.
Code: Select all
0x30
0x3a
0x27
0x1a8
0x10c
0x1a8
0x119
0x11f
0x120
0x1a2
0x197
0x19b
0x173
0x1c3
0x180
0x308
0x299
0x2e3
0x2f2
0x332
0x2ff
0x302
0x305
0x2fc
0x356
0x340
0x91
0x9a
0x31c
0x323
0x122
0x151
0x16f
0x158
0x20f
0x1a9
0xd4
0x380
0x390
0x3a0
0x0
0x100
0x200
0x300
0xe0
0xe0
0xff
0xe5
0xfa
0xf3
0x200
0x1f5
0x104
0x109
0x11c
0x11c
0x170
0x1fc
0x2fa
0x24b
0x26f
0x27d
0x281
0x288
0x260
0x290
0x2a2
0x2a9
0x2ad
0x2b6
0x2c6
0x2d0
0x2c9
0x2ef
0x63
0x19
0x4c
0x4f
0x58
0x20b
0x20e
0xa6
(edit: updated with six bytes fixed, see here)
I'll try to check my markup of the bits at some point, but there are thousands of them and I'm feeling indolent. Maybe we'll get another 8273 snap this weekend.
Last edited by Diminished on Sat Sep 12, 2020 2:44 pm, edited 2 times in total.
- Diminished
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Quick and dirty bash at the 8273.
I was hoping there might be an EF in here, but it doesn't look like there is.
I was hoping there might be an EF in here, but it doesn't look like there is.
Code: Select all
; entrypoint:
000 04 SEL RB 4
001 f0 08 MOV I0, #0x8
003 f4 00 MOV I4, #0x0
005 f5 ff MOV I5, #0xff
007 b8 00 ???, #0x0
009 b9 00 ???, #0x0
00b bb 00 ???, #0x0
00d bc 01 ???, #0x1
00f c8 f7 AND I0, #0xf7
011 02 SEL RB 2
012 cf c0 AND I7, #0xc0
014 f1 00 MOV I1, #0x0
016 f0 00 MOV I0, #0x0
018 ff YIELD
; entrypoint:
019 03 SEL RB 3
01a 2e MOV A, I14
01b 00 SEL RB 0
01c e8 MOV [I0], A
01d 00 SEL RB 0
01e 80 ADC A, I0
01f a1 DEC I1
020 88 23 BMI 0x023
022 ff YIELD
023 03 SEL RB 3
024 2f MOV A, I15
025 00 SEL RB 0
026 ec SYS 0, RB, A
; entrypoint:
027 a9 ???
028 9c 0f AND A, #0xf
02a 8b 49 BNZ 0x049
02c b9 01 ???, #0x1
02e fe 49 JMP 0x049
; entrypoint:
030 ab ???
031 9c 0f AND A, #0xf
033 8a 47 BZ 0x047
035 02 SEL RB 2
036 d8 20 OR I0, #0x20
038 fe 49 JMP 0x049
; entrypoint:
03a 02 SEL RB 2
03b 71 01 47 TBNZ I1, #0x1, 0x047
03e d9 01 OR I1, #0x1
040 f5 7e MOV I5, #0x7e
042 04 SEL RB 4
043 dc 90 OR I4, #0x90
045 f5 7e MOV I5, #0x7e
047 bb 02 ???, #0x2
049 fc a2 CALL 0x0a2
04b 11 WAIT 1
; entrypoint:
04c 03 SEL RB 3
04d 2e MOV A, I14
04e ff YIELD
; entrypoint:
04f fc 5e CALL 0x05e
051 03 SEL RB 3
052 d6 OR A, I6
053 00 SEL RB 0
054 e1 XOR A, I1
055 e8 MOV [I0], A
056 fe 49 JMP 0x049
; entrypoint:
058 fc 5e CALL 0x05e
05a 03 SEL RB 3
05b c6 AND A, I6
05c fe 53 JMP 0x053
05e 00 SEL RB 0
05f f8 MOV A, [I0]
060 00 SEL RB 0
061 e1 XOR A, I1
062 fd RET
; entrypoint:
063 02 SEL RB 2
064 cf bf AND I7, #0xbf
066 2f MOV A, I15
067 f9 SHL A
068 89 70 BPL 0x070
06a f9 SHL A
06b 89 70 BPL 0x070
06d 2f MOV A, I15
06e 0a SEL RB 10
06f ec SYS 0, RB, A
070 2f MOV A, I15
071 00 SEL RB 0
072 30 MOV I0, A
073 c8 3f AND I0, #0x3f
075 40 23 7c BEQ I0, #0x23, 0x07c
078 f1 00 MOV I1, #0x0
07a fe 7e JMP 0x07e
07c f1 ff MOV I1, #0xff
07e 03 SEL RB 3
07f 6f c0 8b TBZ I15, #0xc0, 0x08b
082 7f 40 88 TBNZ I15, #0x40, 0x088
085 bc 02 ???, #0x2
087 ff YIELD
088 bc 03 ???, #0x3
08a ff YIELD
08b fc 5e CALL 0x05e
08d 02 SEL RB 2
08e 36 MOV I6, A
08f fe 49 JMP 0x049
; entrypoint:
091 02 SEL RB 2
092 cf ef AND I7, #0xef
094 b9 00 ???, #0x0
096 11 WAIT 1
097 39 MOV I9, A
098 fe 49 JMP 0x049
; entrypoint:
09a 01 SEL RB 1
09b 38 MOV I8, A
09c fc a2 CALL 0x0a2
09e 98 10 MOV A, #0x10
0a0 fe d4 JMP 0x0d4
0a2 02 SEL RB 2
0a3 cf 7f AND I7, #0x7f
0a5 fd RET
; entrypoint:
0a6 70 04 af TBNZ I0, #0x4, 0x0af
0a9 62 02 b0 TBZ I2, #0x2, 0x0b0
0ac 62 01 be TBZ I2, #0x1, 0x0be
0af ff YIELD
0b0 a9 ???
0b1 9c 0e AND A, #0xe
0b3 8a af BZ 0x0af
0b5 98 0a MOV A, #0xa
0b7 fc bc CALL 0x0bc
0b9 b9 00 ???, #0x0
0bb ff YIELD
0bc 01 SEL RB 1
0bd ee SYS 2, RB
0be ab ???
0bf 01 SEL RB 1
0c0 3b MOV I11, A
0c1 4b f0 af BEQ I11, #0xf0, 0x0af
0c4 4b f1 af BEQ I11, #0xf1, 0x0af
0c7 4b f2 af BEQ I11, #0xf2, 0x0af
0ca 5b ff d2 BNE I11, #0xff, 0x0d2
0cd aa ???
0ce 9c 0f AND A, #0xf
0d0 89 af BPL 0x0af
0d2 98 0f MOV A, #0xf
; entrypoint:
0d4 01 SEL RB 1
0d5 d8 00 OR I0, #0x0
0d7 06 SEL RB 6
0d8 34 MOV I4, A
0d9 cf df AND I7, #0xdf
0db bb 0f ???, #0xf
0dd ba 03 ???, #0x3
0df ff YIELD
; entrypoint:
0e0 cf f7 AND I7, #0xf7
0e2 b8 00 ???, #0x0
0e4 fd RET
; entrypoint:
0e5 28 MOV A, I8
0e6 33 MOV I3, A
0e7 61 04 ed TBZ I1, #0x4, 0x0ed
0ea b8 02 ???, #0x2
0ec fd RET
0ed 70 08 f7 TBNZ I0, #0x8, 0x0f7
0f0 b8 05 ???, #0x5
0f2 fd RET
; entrypoint:
0f3 22 MOV A, I2
0f4 33 MOV I3, A
0f5 fe ed JMP 0x0ed
0f7 b8 06 ???, #0x6
0f9 fd RET
; entrypoint:
0fa 2a MOV A, I10
0fb 33 MOV I3, A
0fc b8 01 ???, #0x1
0fe fd RET
; entrypoint:
0ff 29 MOV A, I9
; entrypoint:
100 33 MOV I3, A
101 b8 03 ???, #0x3
103 fd RET
; entrypoint:
104 21 MOV A, I1
105 02 SEL RB 2
106 c8 fb AND I0, #0xfb
108 ff YIELD
; entrypoint:
109 21 MOV A, I1
10a 04 SEL RB 4
10b ec SYS 0, RB, A
; entrypoint:
10c 02 SEL RB 2
10d 60 04 a8 TBZ I0, #0x4, 0x1a8
110 c8 fb AND I0, #0xfb
112 98 05 MOV A, #0x5
114 fc a9 CALL 0x1a9
116 b8 05 ???, #0x5
118 10 WAIT 0
; entrypoint:
119 fc bd CALL 0x1bd
11b 12 WAIT 2
; entrypoint:
11c 21 MOV A, I1
11d 05 SEL RB 5
11e ec SYS 0, RB, A
; entrypoint:
11f 11 WAIT 1
; entrypoint:
120 00 SEL RB 0
121 ed ???
; entrypoint:
122 26 MOV A, I6
123 01 SEL RB 1
124 36 MOV I6, A
125 49 c0 31 BEQ I9, #0xc0, 0x131
128 26 MOV A, I6
129 e6 XOR A, I6
12a 8a 31 BZ 0x131
12c 26 MOV A, I6
12d e7 XOR A, I7
12e 8a 36 BZ 0x136
130 11 WAIT 1
131 02 SEL RB 2
132 c8 ef AND I0, #0xef
134 fe 39 JMP 0x139
136 02 SEL RB 2
137 d8 10 OR I0, #0x10
139 01 SEL RB 1
13a 59 c2 50 BNE I9, #0xc2, 0x150
13d 04 SEL RB 4
13e f5 7e MOV I5, #0x7e
140 dc 90 OR I4, #0x90
142 02 SEL RB 2
143 d9 01 OR I1, #0x1
145 f5 7e MOV I5, #0x7e
147 ab ???
148 9c 0f AND A, #0xf
14a 8b 50 BNZ 0x150
14c bb 0f ???, #0xf
14e ba 02 ???, #0x2
150 13 WAIT 3
; entrypoint:
151 26 MOV A, I6
152 00 SEL RB 0
153 37 MOV I7, A
154 02 SEL RB 2
155 71 04 6e TBNZ I1, #0x4, 0x16e
; entrypoint:
158 a8 ???
159 9c 0f AND A, #0xf
15b 8b a9 BNZ 0x1a9
15d 00 SEL RB 0
15e 27 MOV A, I7
15f 0a SEL RB 10
160 df 10 OR I7, #0x10
162 32 MOV I2, A
163 d8 04 OR I0, #0x4
165 00 SEL RB 0
166 26 MOV A, I6
167 03 SEL RB 3
168 3a MOV I10, A
169 f0 00 MOV I0, #0x0
16b f1 00 MOV I1, #0x0
16d 19 WAIT 9
16e 14 WAIT 4
; entrypoint:
16f 15 WAIT 5
; entrypoint:
170 21 MOV A, I1
171 07 SEL RB 7
172 ec SYS 0, RB, A
; entrypoint:
173 fc bd CALL 0x1bd
175 98 03 MOV A, #0x3
177 fc a9 CALL 0x1a9
179 b8 05 ???, #0x5
17b 12 WAIT 2
17c 98 07 MOV A, #0x7
17e fe 77 JMP 0x177
; entrypoint:
180 03 SEL RB 3
181 81 ADC A, I1
182 90 ???
183 01 SEL RB 1
184 a4 DEC I4
185 b5 ???
186 88 90 BMI 0x190
188 2c MOV A, I12
189 d5 OR A, I5
18a 8b 6d BNZ 0x16d
18c 02 SEL RB 2
18d cf ef AND I7, #0xef
18f ff YIELD
190 98 09 MOV A, #0x9
192 fc a9 CALL 0x1a9
194 b8 05 ???, #0x5
196 10 WAIT 0
; entrypoint:
197 02 SEL RB 2
198 61 20 a2 TBZ I1, #0x20, 0x1a2
; entrypoint:
19b 98 04 MOV A, #0x4
19d fc a9 CALL 0x1a9
19f b8 05 ???, #0x5
1a1 11 WAIT 1
; entrypoint:
1a2 02 SEL RB 2
1a3 98 06 MOV A, #0x6
1a5 71 10 14 TBNZ I1, #0x10, 0x114
; entrypoint:
1a8 ff YIELD
; entrypoint:
1a9 02 SEL RB 2
1aa cf ef AND I7, #0xef
1ac 01 SEL RB 1
1ad 3a MOV I10, A
1ae a8 ???
1af 9c 0f AND A, #0xf
1b1 8a b7 BZ 0x1b7
1b3 02 SEL RB 2
1b4 d8 08 OR I0, #0x8
1b6 10 WAIT 0
1b7 2a MOV A, I10
1b8 02 SEL RB 2
1b9 33 MOV I3, A
1ba df 08 OR I7, #0x8
1bc fd RET
1bd 04 SEL RB 4
1be cb df AND I3, #0xdf
1c0 db 20 OR I3, #0x20
1c2 fd RET
; entrypoint:
1c3 02 SEL RB 2
1c4 cf ef AND I7, #0xef
1c6 fc bd CALL 0x1bd
1c8 03 SEL RB 3
1c9 78 ff e2 TBNZ I8, #0xff, 0x1e2
1cc 29 MOV A, I9
1cd 01 SEL RB 1
1ce 3a MOV I10, A
1cf 02 SEL RB 2
1d0 71 04 da TBNZ I1, #0x4, 0x1da
1d3 01 SEL RB 1
1d4 a2 DEC I2
1d5 88 7c BMI 0x17c
1d7 a2 DEC I2
1d8 88 7c BMI 0x17c
1da 01 SEL RB 1
1db 7a ff e2 TBNZ I10, #0xff, 0x1e2
1de 04 SEL RB 4
1df 56 e0 7c BNE I6, #0xe0, 0x17c
1e2 04 SEL RB 4
1e3 26 MOV A, I6
1e4 01 SEL RB 1
1e5 3a MOV I10, A
1e6 98 01 MOV A, #0x1
1e8 02 SEL RB 2
1e9 70 10 ee TBNZ I0, #0x10, 0x1ee
1ec 98 00 MOV A, #0x0
1ee 01 SEL RB 1
1ef d2 OR A, I2
1f0 fc ac CALL 0x1ac
1f2 b8 04 ???, #0x4
1f4 12 WAIT 2
; entrypoint:
1f5 98 08 MOV A, #0x8
1f7 fc a9 CALL 0x1a9
1f9 b9 00 ???, #0x0
1fb ff YIELD
; entrypoint:
1fc 98 0e MOV A, #0xe
1fe 02 SEL RB 2
1ff ee SYS 2, RB
; entrypoint:
200 cf f7 AND I7, #0xf7
202 f3 0b MOV I3, #0xb
204 df 08 OR I7, #0x8
206 c8 f7 AND I0, #0xf7
208 b8 05 ???, #0x5
20a fd RET
; entrypoint:
20b 02 SEL RB 2
20c cf fb AND I7, #0xfb
; entrypoint:
20e ff YIELD
; entrypoint:
20f 02 SEL RB 2
210 71 01 19 TBNZ I1, #0x1, 0x219
213 f5 ff MOV I5, #0xff
215 04 SEL RB 4
216 f5 ff MOV I5, #0xff
218 fd RET
219 f5 7e MOV I5, #0x7e
21b 04 SEL RB 4
21c f5 7e MOV I5, #0x7e
21e fd RET
21f 04 SEL RB 4
220 70 01 29 TBNZ I0, #0x1, 0x229
223 f5 55 MOV I5, #0x55
225 02 SEL RB 2
226 f5 55 MOV I5, #0x55
228 fd RET
229 f5 00 MOV I5, #0x0
22b 02 SEL RB 2
22c f5 00 MOV I5, #0x0
22e fd RET
22f 01 SEL RB 1
230 48 c9 36 BEQ I8, #0xc9, 0x236
233 04 SEL RB 4
234 dc 04 OR I4, #0x4
236 00 SEL RB 0
237 a2 DEC I2
238 b3 ???
239 02 SEL RB 2
23a 89 45 BPL 0x245
23c cf df AND I7, #0xdf
23e 00 SEL RB 0
23f f3 00 MOV I3, #0x0
241 f2 00 MOV I2, #0x0
243 ea SEC
244 fd RET
245 df 20 OR I7, #0x20
247 d8 02 OR I0, #0x2
249 eb CLC
24a fd RET
; entrypoint:
24b 63 01 53 TBZ I3, #0x1, 0x253
24e cb fe AND I3, #0xfe
250 02 SEL RB 2
251 c8 fe AND I0, #0xfe
253 04 SEL RB 4
254 70 04 5b TBNZ I0, #0x4, 0x25b
257 72 01 5b TBNZ I2, #0x1, 0x25b
25a 11 WAIT 1
25b 02 SEL RB 2
25c 61 02 60 TBZ I1, #0x2, 0x260
25f 15 WAIT 5
; entrypoint:
260 bb 07 ???, #0x7
262 01 SEL RB 1
263 48 c9 6a BEQ I8, #0xc9, 0x26a
266 02 SEL RB 2
267 71 04 8f TBNZ I1, #0x4, 0x28f
26a 02 SEL RB 2
26b 71 80 81 TBNZ I1, #0x80, 0x281
26e 14 WAIT 4
; entrypoint:
26f 02 SEL RB 2
270 c8 fd AND I0, #0xfd
272 04 SEL RB 4
273 cc 6f AND I4, #0x6f
275 73 01 4e TBNZ I3, #0x1, 0x24e
278 02 SEL RB 2
279 d8 01 OR I0, #0x1
27b fe 53 JMP 0x253
; entrypoint:
27d cc 5b AND I4, #0x5b
27f f5 7e MOV I5, #0x7e
; entrypoint:
281 fc 36 CALL 0x236
283 01 SEL RB 1
284 48 c9 a1 BEQ I8, #0xc9, 0x2a1
287 17 WAIT 7
; entrypoint:
288 fc 1f CALL 0x21f
28a bb 06 ???, #0x6
28c 61 80 62 TBZ I1, #0x80, 0x262
28f ff YIELD
; entrypoint:
290 cc 5b AND I4, #0x5b
292 f5 7e MOV I5, #0x7e
294 02 SEL RB 2
295 61 04 9f TBZ I1, #0x4, 0x29f
298 18 WAIT 8
; entrypoint:
299 02 SEL RB 2
29a f4 0d MOV I4, #0xd
29c ba 09 ???, #0x9
29e ff YIELD
29f fc 36 CALL 0x236
2a1 1a WAIT 10
; entrypoint:
2a2 00 SEL RB 0
2a3 24 MOV A, I4
2a4 04 SEL RB 4
2a5 35 MOV I5, A
2a6 fc 33 CALL 0x233
2a8 19 WAIT 9
; entrypoint:
2a9 00 SEL RB 0
2aa 25 MOV A, I5
2ab 04 SEL RB 4
2ac 35 MOV I5, A
; entrypoint:
2ad fc 2f CALL 0x22f
2af 89 a1 BPL 0x2a1
2b1 02 SEL RB 2
2b2 60 02 bd TBZ I0, #0x2, 0x2bd
2b5 1b WAIT 11
; entrypoint:
2b6 02 SEL RB 2
2b7 c8 df AND I0, #0xdf
2b9 01 SEL RB 1
2ba 48 c9 cd BEQ I8, #0xc9, 0x2cd
2bd 02 SEL RB 2
2be 61 08 c5 TBZ I1, #0x8, 0x2c5
2c1 f4 0c MOV I4, #0xc
2c3 df 04 OR I7, #0x4
2c5 1c WAIT 12
; entrypoint:
2c6 dc 60 OR I4, #0x60
2c8 1d WAIT 13
; entrypoint:
2c9 cc db AND I4, #0xdb
2cb f5 7e MOV I5, #0x7e
2cd ba 00 ???, #0x0
2cf 1f WAIT 15
; entrypoint:
2d0 cc bf AND I4, #0xbf
2d2 02 SEL RB 2
2d3 70 20 d7 TBNZ I0, #0x20, 0x2d7
2d6 1e WAIT 14
2d7 71 04 e1 TBNZ I1, #0x4, 0x2e1
2da 71 40 e2 TBNZ I1, #0x40, 0x2e2
2dd df 20 OR I7, #0x20
2df fc 36 CALL 0x236
2e1 17 WAIT 7
2e2 13 WAIT 3
; entrypoint:
2e3 f5 7e MOV I5, #0x7e
2e5 cc 6f AND I4, #0x6f
2e7 02 SEL RB 2
2e8 71 01 9e TBNZ I1, #0x1, 0x29e
2eb 04 SEL RB 4
2ec dc 80 OR I4, #0x80
2ee 10 WAIT 0
; entrypoint:
2ef 08 SEL RB 8
2f0 aa ???
2f1 ec SYS 0, RB, A
; entrypoint:
2f2 cc 4b AND I4, #0x4b
2f4 ba 04 ???, #0x4
2f6 01 SEL RB 1
2f7 28 MOV A, I8
2f8 09 SEL RB 9
2f9 ec SYS 0, RB, A
; entrypoint:
2fa cc db AND I4, #0xdb
; entrypoint:
2fc fc 0f CALL 0x20f
2fe ff YIELD
; entrypoint:
2ff aa ???
; entrypoint:
300 0b SEL RB 11
301 ec SYS 0, RB, A
; entrypoint:
302 f5 ff MOV I5, #0xff
304 ff YIELD
; entrypoint:
305 f5 7e MOV I5, #0x7e
307 ff YIELD
; entrypoint:
308 fc 3e CALL 0x33e
30a 01 SEL RB 1
30b 48 ca 11 BEQ I8, #0xca, 0x311
30e ba 01 ???, #0x1
310 ff YIELD
311 02 SEL RB 2
312 f4 0d MOV I4, #0xd
314 02 SEL RB 2
315 c9 fe AND I1, #0xfe
317 04 SEL RB 4
318 dc 80 OR I4, #0x80
31a fe 23 JMP 0x323
; entrypoint:
31c 01 SEL RB 1
31d 68 04 23 TBZ I8, #0x4, 0x323
320 ba 0b ???, #0xb
322 ff YIELD
; entrypoint:
323 02 SEL RB 2
324 70 01 2a TBNZ I0, #0x1, 0x32a
327 04 SEL RB 4
328 db 01 OR I3, #0x1
32a 02 SEL RB 2
32b df 04 OR I7, #0x4
32d 70 20 31 TBNZ I0, #0x20, 0x331
330 10 WAIT 0
331 12 WAIT 2
; entrypoint:
332 fc 3e CALL 0x33e
334 02 SEL RB 2
335 c8 df AND I0, #0xdf
337 01 SEL RB 1
338 48 ce 14 BEQ I8, #0xce, 0x314
33b ba 09 ???, #0x9
33d ff YIELD
33e 00 SEL RB 0
33f ee SYS 2, RB
; entrypoint:
340 00 SEL RB 0
341 f0 02 MOV I0, #0x2
343 38 MOV I8, A
344 58 c9 4d BNE I8, #0xc9, 0x34d
347 00 SEL RB 0
348 f1 01 MOV I1, #0x1
34a bc 00 ???, #0x0
34c ff YIELD
34d 02 SEL RB 2
34e 61 04 47 TBZ I1, #0x4, 0x347
351 00 SEL RB 0
352 f1 03 MOV I1, #0x3
354 fe 4a JMP 0x34a
; entrypoint:
356 00 SEL RB 0
357 39 MOV I9, A
358 f0 0c MOV I0, #0xc
35a 49 c0 47 BEQ I9, #0xc0, 0x347
35d f6 59 MOV I6, #0x59
35f 00 SEL RB 0
- scarybeasts
- Posts: 605
- Joined: Tue Feb 06, 2018 7:44 am
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Wow! How very productive!
I'm probably not going to get involved in anything 8273 related (other than using it as a tool to learn about the 8271 if necessary).
But from a quick glance, the entry points for curious minds look to be as follows:
$063: wakeup when command register ($FE80 in beeb terms) is written. Does command dispatch based on various comparisons of R31 (RB 2 + I15), and a jump table invoked at $06F.
$019: wakeup when parameter register ($FE81 in beeb terms), but probably only if the command dispatch enabled this particular wakeup. (There could be three different parameter handlers, selected with BC xx if the dispatcher request assignments are the same as the 8271.) Reads R30 (RB 3 + I14) and writes it to an incrementing register address pointer. ($01E should be INC I0).
Cheers
Chris
- Diminished
- Posts: 598
- Joined: Fri Dec 08, 2017 9:47 pm
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Yeah, I'm disappointed, honestly. I was hoping to find some opcodes not used by the other chip, but I don't think there are any. (edit: actually not true!)
Probably time I went back to doing something else.
Probably time I went back to doing something else.
Last edited by Diminished on Sat Sep 12, 2020 3:08 pm, edited 1 time in total.
- Diminished
- Posts: 598
- Joined: Fri Dec 08, 2017 9:47 pm
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
(Here's the trashy disassembler I scraped together to list the 8273 program. Basically useless but hey.)
Code: Select all
<?php
define("OPARG_IMM", 1);
define("OPARG_ABS", 2);
define("OPARG_UNK", 3);
define("OPARG_IMM_NOCOMMA", 4);
define("OPARG_ABS_NOCOMMA", 5);
//$s = file_get_contents("my8271.bin");
$argv = $_SERVER['argv'];
if (! isset ($argv[1])) {
print "Usage:\n php -f 827xdis.php <binary file> [starting PC in hex]\n";
die();
}
$s = file_get_contents($argv[1]);
$a = 0;
if (isset($argv[2])) {
if (! ctype_xdigit($argv[2])) {
print "Bad start PC value \"".$argv[2]."\".\n";
die();
}
$a = hexdec($argv[2]);
if ($a > 0x3ff) {
print "Bad start PC value ".$argv[2]." (max 3ff).\n";
die();
}
}
$opcodes = array();
$opargs = array();
for ($i=0;$i<=0xff;$i++) {
$opcodes[$i] = "???";
$opargs[$i] = array();
}
for ($i=0x0; $i<=0xf; $i++) {
$opcodes[$i] = "SEL RB ".$i;
$opcodes[$i+0x10] = "YIELDTO ".$i;
$opcodes[$i+0x20] = "MOV A, I".$i;
$opcodes[$i+0x30] = "MOV I".$i.", A";
$opcodes[$i+0x40] = "BEQ I".$i;
$opargs[$i+0x40] = array(0=>OPARG_IMM, 1=>OPARG_ABS);
$opcodes[$i+0x50] = "BNE I".$i;
$opargs[$i+0x50] = array(0=>OPARG_IMM, 1=>OPARG_ABS);
$opcodes[$i+0x60] = "TBZ I".$i;
$opargs[$i+0x60] = array(0=>OPARG_IMM, 1=>OPARG_ABS);
$opcodes[$i+0x70] = "TBNZ I".$i;
$opargs[$i+0x70] = array(0=>OPARG_IMM, 1=>OPARG_ABS);
}
for ($i=0x0; $i<=3; $i++) {
$opcodes[$i+0x80] = "INC I".$i;
$opcodes[$i+0x84] = "ADC I".$i;
//$opcodes[$i+0x80] = "ADC A, I".$i;
}
$opcodes[0x88] = "BMI";
$opargs[0x88] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0x89] = "BPL";
$opargs[0x89] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0x8a] = "BZ";
$opargs[0x8a] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0x8b] = "BNZ";
$opargs[0x8b] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0x8c] = "B??";
$opargs[0x8c] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0x8d] = "B??";
$opargs[0x8d] = array(0=>OPARG_ABS_NOCOMMA);
//$opcodes[0x8e] = "!!!";
for ($i=0; $i<=3; $i++) {
$opcodes[0x94 + $i] = "SBC I".$i;
}
$opcodes[0x98] = "MOV A";
$opargs[0x98] = array(0=>OPARG_IMM);
$opcodes[0x9c] = "AND A";
$opargs[0x9c] = array(0=>OPARG_IMM);
$opcodes[0x9d] = "OR A";
$opargs[0x9d] = array(0=>OPARG_IMM);
for ($i=0; $i<=7; $i++) {
$opcodes[0xa0 + $i] = "DEC I".$i;
$opcodes[0xb8 + $i] = "TASK ".$i;
$opargs[0xb8 + $i] = array(0=>OPARG_IMM);
$opcodes[0xc0 + $i] = "AND A, I".$i;
$opcodes[0xc8 + $i] = "AND I".$i;
$opargs[0xc8 + $i] = array(0=>OPARG_IMM);
$opcodes[0xd0 + $i] = "OR A, I".$i;
$opcodes[0xd8 + $i] = "OR I".$i;
$opargs[0xd8 + $i] = array(0=>OPARG_IMM);
$opcodes[0xe0 + $i] = "XOR A, I".$i;
$opcodes[0xf0 + $i] = "MOV I".$i;
$opargs[0xf0 + $i] = array(0=>OPARG_IMM);
}
$opcodes[0xe8] = "MOV [I0], A";
$opcodes[0xe9] = "SHR A";
$opcodes[0xea] = "SEC";
$opcodes[0xeb] = "CLC";
$opcodes[0xec] = "SYS 0, RB, A";
$opcodes[0xee] = "SYS 2, RB";
$opcodes[0xf8] = "MOV A, [I0]";
$opcodes[0xf9] = "SHL A";
$opcodes[0xfc] = "CALL";
$opargs[0xfc] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0xfd] = "RET";
$opcodes[0xfe] = "JMP";
$opargs[0xfe] = array(0=>OPARG_ABS_NOCOMMA);
$opcodes[0xff] = "YIELD";
$len = strlen($s);
$new_op = 1;
$bytes_left = 0;
$addr_s="";
$hex_s="";
$op_s="";
//print_r($opargs); die();
$argnum = 0;
for ($i=0; $i < $len; $i++, $a++) {
if ($a > 0x3ff) {
print "-- Error: PC exceeded 3ff, aborting.\n";
die();
}
$b = ord($s[$i]);
//print "b=".sprintf("0x%x ", $b)."bl=".$bytes_left."\n";
$hex_s.=sprintf("%02x ", $b);
switch ($bytes_left) {
case 0:
$args = $opargs[$b];
// print address
$addr_s = sprintf("%03x", $a);
$bytes_left = 1 + count($args);
$op_s .= $opcodes[$b];
break;
default:
//print_r($args[0]); die();
$op_s .= process_arg($b, array_shift($args), $a, $argnum);
$argnum++;
break;
}
$bytes_left--;
if ($bytes_left <= 0) {
$addr_s = str_pad($addr_s, 6, " ");
$hex_s = str_pad($hex_s, 10, " ");
$op_s = str_pad($op_s, 7, " ");
print $addr_s." ".$hex_s." ".$op_s."\n";
$addr_s="";
$hex_s="";
$op_s="";
$bytes_left = 0;
$argnum = 0;
}
}
function process_arg($b, $arg, $addr, $argnum) {
$s="";
if ($argnum == 0) { $s = " "; }
switch ($arg) {
case OPARG_IMM:
return ", #".sprintf("0x%x", $b);
case OPARG_ABS:
$s = ", ";
case OPARG_ABS_NOCOMMA:
$s .= sprintf("0x%03x", $addr&0xf00 | 0xff&$b);
return $s;
case OPARG_UNK:
return "";
default:
print "say what? [".$b."]\n";
die();
}
}
?>
Last edited by Diminished on Sat Sep 12, 2020 9:06 am, edited 1 time in total.
- Rich Talbot-Watkins
- Posts: 1707
- Joined: Thu Jan 13, 2005 5:20 pm
- Location: Palma, Mallorca
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
That's awesome.
And you may also possibly have written the most niche program ever written!
And you may also possibly have written the most niche program ever written!

- scarybeasts
- Posts: 605
- Joined: Tue Feb 06, 2018 7:44 am
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
We still have opcodes in the 8271 ROM that we have no clue about. It's possible the the same opcodes in the 8273 might appear in different contexts, and with better clues.Diminished wrote: ↑Fri Sep 11, 2020 9:26 amYeah, I'm disappointed, honestly. I was hoping to find some opcodes not used by the other chip, but I don't think there are any.
The unknown opcodes include $9A, $9B, $8C.
We also have a _lot_ of fuzziness on $E7, as well as all of the ADD / SUB type instructions and carry flag setting. I managed to get the seek code sort-of sane (it does a lot of track number comparisons, and has to do things like negate) but I'm not confident in it...
Cheers
Chris
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I believe the first left column is 111x1xxx rather than 111xxxxx.
Various teletext things including a web based teletext editor which can export as mode 7 screens.
Join the Teletext Discord for teletext chat.
Join the Teletext Discord for teletext chat.
- Diminished
- Posts: 598
- Joined: Fri Dec 08, 2017 9:47 pm
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Sean wasn't kidding when he said he chipped one of those 8273 dies.
Anyway, he picked the correct corner to chip and the tables are readable on this sample, so I was able to complete the (preliminary) job on the 8273.
EDIT: there were six errors in this transcription, hopefully now fixed:
I can update the disassembler and just run it through again if any of the opcodes change.
I have some confidence in the entrypoints, but it's hard to transcribe the program ROM without making mistakes, so the code itself should be treated with a degree of suspicion.

Although I suppose that's a little clue in itself? They might be relatively specialised.
e7 appears to get a single workout in the '3, at 12d.
Looking again, there are some ABs, A9s and AAs in the 8273, which I don't think the 8271 uses? Which is interesting.
Anyway, he picked the correct corner to chip and the tables are readable on this sample, so I was able to complete the (preliminary) job on the 8273.
EDIT: there were six errors in this transcription, hopefully now fixed:
Code: Select all
; entry point #40 (2, 6, 0) -> (2, 6, 15):
000 04 SEL RB 4
001 f0 08 MOV I0, #0x8
003 f4 00 MOV I4, #0x0
005 f5 ff MOV I5, #0xff
007 b8 00 TASK 0, #0x0
009 b9 00 TASK 1, #0x0
00b bb 00 TASK 3, #0x0
00d bc 01 TASK 4, #0x1
00f c8 f7 AND I0, #0xf7
011 02 SEL RB 2
012 cf c0 AND I7, #0xc0
014 f1 00 MOV I1, #0x0
016 f0 00 MOV I0, #0x0
018 ff YIELD
; entry point #75 (3, 9, 0):
019 03 SEL RB 3
01a 2e MOV A, I14
01b 00 SEL RB 0
01c e8 MOV [I0], A
01d 00 SEL RB 0
01e 80 INC I0
01f a1 DEC I1
020 88 23 BMI 0x023
022 ff YIELD
023 03 SEL RB 3
024 2f MOV A, I15
025 00 SEL RB 0
026 ec SYS 0, RB, A
; entry point #2 (0, 0, 0) -> (0, 0, 3):
027 a9 ???
028 9c 0f AND A, #0xf
02a 8b 49 BNZ 0x049
02c b9 01 TASK 1, #0x1
02e fe 49 JMP 0x049
; entry point #0 (0, 0, 8) -> (0, 0, 9):
030 ab ???
031 9c 0f AND A, #0xf
033 8a 47 BZ 0x047
035 02 SEL RB 2
036 d8 20 OR I0, #0x20
038 fe 49 JMP 0x049
; entry point #1 (0, 0, 10) -> (0, 0, 11):
03a 02 SEL RB 2
03b 71 01 47 TBNZ I1, #0x1, 0x047
03e d9 01 OR I1, #0x1
040 f5 7e MOV I5, #0x7e
042 04 SEL RB 4
043 dc 90 OR I4, #0x90
045 f5 7e MOV I5, #0x7e
047 bb 02 TASK 3, #0x2
049 fc a2 CALL 0x0a2
04b 11 YIELDTO 1
; entry point #76 (3, 9, 1):
04c 03 SEL RB 3
04d 2e MOV A, I14
04e ff YIELD
; entry point #77 (3, 9, 2):
04f fc 5e CALL 0x05e
051 03 SEL RB 3
052 d6 OR A, I6
053 00 SEL RB 0
054 e1 XOR A, I1
055 e8 MOV [I0], A
056 fe 49 JMP 0x049
; entry point #78 (3, 9, 3):
058 fc 5e CALL 0x05e
05a 03 SEL RB 3
05b c6 AND A, I6
05c fe 53 JMP 0x053
05e 00 SEL RB 0
05f f8 MOV A, [I0]
060 00 SEL RB 0
061 e1 XOR A, I1
062 fd RET
; entry point #74 (3, 8, 0) -> (3, 8, 15):
063 02 SEL RB 2
064 cf bf AND I7, #0xbf
066 2f MOV A, I15
067 f9 SHL A
068 89 70 BPL 0x070
06a f9 SHL A
06b 89 70 BPL 0x070
06d 2f MOV A, I15
06e 0a SEL RB 10
06f ec SYS 0, RB, A
070 2f MOV A, I15
071 00 SEL RB 0
072 30 MOV I0, A
073 c8 3f AND I0, #0x3f
075 40 23 7c BEQ I0, #0x23, 0x07c
078 f1 00 MOV I1, #0x0
07a fe 7e JMP 0x07e
07c f1 ff MOV I1, #0xff
07e 03 SEL RB 3
07f 6f c0 8b TBZ I15, #0xc0, 0x08b
082 7f 40 88 TBNZ I15, #0x40, 0x088
085 bc 02 TASK 4, #0x2
087 ff YIELD
088 bc 03 TASK 4, #0x3
08a ff YIELD
08b fc 5e CALL 0x05e
08d 02 SEL RB 2
08e 36 MOV I6, A
08f fe 49 JMP 0x049
; entry point #26 (0, 10, 5):
091 02 SEL RB 2
092 cf ef AND I7, #0xef
094 b9 00 TASK 1, #0x0
096 11 YIELDTO 1
097 39 MOV I9, A
098 fe 49 JMP 0x049
; entry point #27 (0, 10, 12) -> (0, 10, 15):
09a 01 SEL RB 1
09b 38 MOV I8, A
09c fc a2 CALL 0x0a2
09e 98 10 MOV A, #0x10
0a0 fe d4 JMP 0x0d4
0a2 02 SEL RB 2
0a3 cf 7f AND I7, #0x7f
0a5 fd RET
; entry point #81 (3, 13, 0) -> (3, 13, 15):
0a6 70 04 af TBNZ I0, #0x4, 0x0af
0a9 62 02 b0 TBZ I2, #0x2, 0x0b0
0ac 62 01 be TBZ I2, #0x1, 0x0be
0af ff YIELD
0b0 a9 ???
0b1 9c 0e AND A, #0xe
0b3 8a af BZ 0x0af
0b5 98 0a MOV A, #0xa
0b7 fc bc CALL 0x0bc
0b9 b9 00 TASK 1, #0x0
0bb ff YIELD
0bc 01 SEL RB 1
0bd ee SYS 2, RB
0be ab ???
0bf 01 SEL RB 1
0c0 3b MOV I11, A
0c1 4b f0 af BEQ I11, #0xf0, 0x0af
0c4 4b f1 af BEQ I11, #0xf1, 0x0af
0c7 4b f2 af BEQ I11, #0xf2, 0x0af
0ca 5b ff d2 BNE I11, #0xff, 0x0d2
0cd aa ???
0ce 9c 0f AND A, #0xf
0d0 8b af BNZ 0x0af
0d2 98 0f MOV A, #0xf
; entry point #36 (2, 2, 0) -> (2, 2, 15):
0d4 01 SEL RB 1
0d5 d8 04 OR I0, #0x4
0d7 02 SEL RB 2
0d8 34 MOV I4, A
0d9 cf df AND I7, #0xdf
0db bb 0f TASK 3, #0xf
0dd ba 03 TASK 2, #0x3
0df ff YIELD
; entry point #45 (3, 1, 5):
0e0 cf f7 AND I7, #0xf7
0e2 b8 00 TASK 0, #0x0
0e4 fd RET
; entry point #47 (3, 1, 3):
0e5 28 MOV A, I8
0e6 33 MOV I3, A
0e7 61 04 ed TBZ I1, #0x4, 0x0ed
0ea b8 02 TASK 0, #0x2
0ec fd RET
0ed 70 08 f7 TBNZ I0, #0x8, 0x0f7
0f0 b8 05 TASK 0, #0x5
0f2 fd RET
; entry point #49 (3, 1, 1):
0f3 22 MOV A, I2
0f4 33 MOV I3, A
0f5 fe ed JMP 0x0ed
0f7 b8 06 TASK 0, #0x6
0f9 fd RET
; entry point #48 (3, 1, 2):
0fa 2a MOV A, I10
0fb 33 MOV I3, A
0fc b8 01 TASK 0, #0x1
0fe fd RET
; entry point #46 (3, 1, 4):
0ff 29 MOV A, I9
; entry point #41 (2, 7, 0) -> (2, 7, 15):
100 33 MOV I3, A
101 b8 03 TASK 0, #0x3
103 fd RET
; entry point #52 (3, 4, 0):
104 21 MOV A, I1
105 02 SEL RB 2
106 c8 fb AND I0, #0xfb
108 ff YIELD
; entry point #53 (3, 4, 1):
109 21 MOV A, I1
10a 04 SEL RB 4
10b ec SYS 0, RB, A
; entry point #4 (0, 4, 9):
10c 02 SEL RB 2
10d 60 04 a8 TBZ I0, #0x4, 0x1a8
110 c8 fb AND I0, #0xfb
112 98 05 MOV A, #0x5
114 fc a9 CALL 0x1a9
116 b8 05 TASK 0, #0x5
118 10 YIELDTO 0
; entry point #6 (0, 4, 12) -> (0, 4, 15), (0, 5, 12) -> (0, 5, 15):
119 fc bd CALL 0x1bd
11b 12 YIELDTO 2
; entry point #55 (3, 4, 4) -> (3, 4, 5):
11c 21 MOV A, I1
11d 05 SEL RB 5
11e ec SYS 0, RB, A
; entry point #7 (0, 5, 10):
11f 11 YIELDTO 1
; entry point #8 (0, 5, 0):
120 00 SEL RB 0
121 ed ???
; entry point #30 (1, 0, 2):
122 26 MOV A, I6
123 01 SEL RB 1
124 36 MOV I6, A
125 49 c0 31 BEQ I9, #0xc0, 0x131
128 26 MOV A, I6
129 e6 XOR A, I6
12a 8a 31 BZ 0x131
12c 26 MOV A, I6
12d e7 XOR A, I7
12e 8a 36 BZ 0x136
130 11 YIELDTO 1
131 02 SEL RB 2
132 c8 ef AND I0, #0xef
134 fe 39 JMP 0x139
136 02 SEL RB 2
137 d8 10 OR I0, #0x10
139 01 SEL RB 1
13a 59 c2 50 BNE I9, #0xc2, 0x150
13d 04 SEL RB 4
13e f5 7e MOV I5, #0x7e
140 dc 90 OR I4, #0x90
142 02 SEL RB 2
143 d9 01 OR I1, #0x1
145 f5 7e MOV I5, #0x7e
147 ab ???
148 9c 0f AND A, #0xf
14a 8b 50 BNZ 0x150
14c bb 0f TASK 3, #0xf
14e ba 02 TASK 2, #0x2
150 13 YIELDTO 3
; entry point #31 (1, 0, 3):
151 26 MOV A, I6
152 00 SEL RB 0
153 37 MOV I7, A
154 02 SEL RB 2
155 71 04 6e TBNZ I1, #0x4, 0x16e
; entry point #33 (1, 0, 5):
158 a8 ???
159 9c 0f AND A, #0xf
15b 8b a9 BNZ 0x1a9
15d 00 SEL RB 0
15e 27 MOV A, I7
15f 02 SEL RB 2
160 df 10 OR I7, #0x10
162 32 MOV I2, A
163 d8 04 OR I0, #0x4
165 00 SEL RB 0
166 26 MOV A, I6
167 03 SEL RB 3
168 3a MOV I10, A
169 f0 00 MOV I0, #0x0
16b f1 00 MOV I1, #0x0
16d 19 YIELDTO 9
16e 14 YIELDTO 4
; entry point #32 (1, 0, 4):
16f 15 YIELDTO 5
; entry point #56 (3, 4, 9):
170 21 MOV A, I1
171 07 SEL RB 7
172 ec SYS 0, RB, A
; entry point #12 (0, 7, 12):
173 fc bd CALL 0x1bd
175 98 03 MOV A, #0x3
177 fc a9 CALL 0x1a9
179 b8 05 TASK 0, #0x5
17b 12 YIELDTO 2
17c 98 07 MOV A, #0x7
17e fe 77 JMP 0x177
; entry point #14 (0, 7, 0):
180 03 SEL RB 3
181 81 INC I1
182 90 ???
183 01 SEL RB 1
184 a4 DEC I4
185 b5 ???
186 88 90 BMI 0x190
188 2c MOV A, I12
189 d5 OR A, I5
18a 8b 6d BNZ 0x16d
18c 02 SEL RB 2
18d cf ef AND I7, #0xef
18f ff YIELD
190 98 09 MOV A, #0x9
192 fc a9 CALL 0x1a9
194 b8 05 TASK 0, #0x5
196 10 YIELDTO 0
; entry point #10 (0, 7, 8):
197 02 SEL RB 2
198 61 20 a2 TBZ I1, #0x20, 0x1a2
; entry point #11 (0, 7, 10):
19b 98 04 MOV A, #0x4
19d fc a9 CALL 0x1a9
19f b8 05 TASK 0, #0x5
1a1 11 YIELDTO 1
; entry point #9 (0, 5, 8):
1a2 02 SEL RB 2
1a3 98 06 MOV A, #0x6
1a5 71 10 14 TBNZ I1, #0x10, 0x114
; entry point #5 (0, 4, 8), (0, 4, 10):
1a8 ff YIELD
; entry point #35 (2, 1, 0) -> (2, 1, 15):
1a9 02 SEL RB 2
1aa cf ef AND I7, #0xef
1ac 01 SEL RB 1
1ad 3a MOV I10, A
1ae a8 ???
1af 9c 0f AND A, #0xf
1b1 8a b7 BZ 0x1b7
1b3 02 SEL RB 2
1b4 d8 08 OR I0, #0x8
1b6 10 YIELDTO 0
1b7 2a MOV A, I10
1b8 02 SEL RB 2
1b9 33 MOV I3, A
1ba df 08 OR I7, #0x8
1bc fd RET
1bd 04 SEL RB 4
1be cb df AND I3, #0xdf
1c0 db 20 OR I3, #0x20
1c2 fd RET
; entry point #13 (0, 7, 13), (0, 7, 15):
1c3 02 SEL RB 2
1c4 cf ef AND I7, #0xef
1c6 fc bd CALL 0x1bd
1c8 03 SEL RB 3
1c9 78 ff e2 TBNZ I8, #0xff, 0x1e2
1cc 29 MOV A, I9
1cd 01 SEL RB 1
1ce 3a MOV I10, A
1cf 02 SEL RB 2
1d0 71 04 da TBNZ I1, #0x4, 0x1da
1d3 01 SEL RB 1
1d4 a2 DEC I2
1d5 88 7c BMI 0x17c
1d7 a2 DEC I2
1d8 88 7c BMI 0x17c
1da 01 SEL RB 1
1db 7a ff e2 TBNZ I10, #0xff, 0x1e2
1de 04 SEL RB 4
1df 56 e0 7c BNE I6, #0xe0, 0x17c
1e2 04 SEL RB 4
1e3 26 MOV A, I6
1e4 01 SEL RB 1
1e5 3a MOV I10, A
1e6 98 01 MOV A, #0x1
1e8 02 SEL RB 2
1e9 70 10 ee TBNZ I0, #0x10, 0x1ee
1ec 98 00 MOV A, #0x0
1ee 01 SEL RB 1
1ef d2 OR A, I2
1f0 fc ac CALL 0x1ac
1f2 b8 04 TASK 0, #0x4
1f4 12 YIELDTO 2
; entry point #51 (3, 3, 0) -> (3, 3, 15):
1f5 98 08 MOV A, #0x8
1f7 fc a9 CALL 0x1a9
1f9 b9 00 TASK 1, #0x0
1fb ff YIELD
; entry point #57 (3, 6, 0) -> (3, 6, 15):
1fc 98 0e MOV A, #0xe
1fe 02 SEL RB 2
1ff ee SYS 2, RB
; entry point #50 (3, 1, 6):
200 cf f7 AND I7, #0xf7
202 f3 0b MOV I3, #0xb
204 df 08 OR I7, #0x8
206 c8 f7 AND I0, #0xf7
208 b8 05 TASK 0, #0x5
20a fd RET
; entry point #79 (3, 10, 0) -> (3, 10, 15):
20b 02 SEL RB 2
20c cf fb AND I7, #0xfb
; entry point #80 (3, 11, 0) -> (3, 11, 15):
20e ff YIELD
; entry point #34 (2, 0, 0) -> (2, 0, 15):
20f 02 SEL RB 2
210 71 01 19 TBNZ I1, #0x1, 0x219
213 f5 ff MOV I5, #0xff
215 04 SEL RB 4
216 f5 ff MOV I5, #0xff
218 fd RET
219 f5 7e MOV I5, #0x7e
21b 04 SEL RB 4
21c f5 7e MOV I5, #0x7e
21e fd RET
21f 04 SEL RB 4
220 70 01 29 TBNZ I0, #0x1, 0x229
223 f5 55 MOV I5, #0x55
225 02 SEL RB 2
226 f5 55 MOV I5, #0x55
228 fd RET
229 f5 00 MOV I5, #0x0
22b 02 SEL RB 2
22c f5 00 MOV I5, #0x0
22e fd RET
22f 01 SEL RB 1
230 48 c9 36 BEQ I8, #0xc9, 0x236
233 04 SEL RB 4
234 dc 04 OR I4, #0x4
236 00 SEL RB 0
237 a2 DEC I2
238 b3 ???
239 02 SEL RB 2
23a 89 45 BPL 0x245
23c cf df AND I7, #0xdf
23e 00 SEL RB 0
23f f3 00 MOV I3, #0x0
241 f2 00 MOV I2, #0x0
243 ea SEC
244 fd RET
245 df 20 OR I7, #0x20
247 d8 02 OR I0, #0x2
249 eb CLC
24a fd RET
; entry point #59 (3, 7, 1):
24b 63 01 53 TBZ I3, #0x1, 0x253
24e cb fe AND I3, #0xfe
250 02 SEL RB 2
251 c8 fe AND I0, #0xfe
253 04 SEL RB 4
254 70 04 5b TBNZ I0, #0x4, 0x25b
257 72 01 5b TBNZ I2, #0x1, 0x25b
25a 11 YIELDTO 1
25b 02 SEL RB 2
25c 61 02 60 TBZ I1, #0x2, 0x260
25f 15 YIELDTO 5
; entry point #64 (3, 7, 6):
260 bb 07 TASK 3, #0x7
262 01 SEL RB 1
263 48 c9 6a BEQ I8, #0xc9, 0x26a
266 02 SEL RB 2
267 71 04 8f TBNZ I1, #0x4, 0x28f
26a 02 SEL RB 2
26b 71 80 81 TBNZ I1, #0x80, 0x281
26e 14 YIELDTO 4
; entry point #60 (3, 7, 2):
26f 02 SEL RB 2
270 c8 fd AND I0, #0xfd
272 04 SEL RB 4
273 cc 6f AND I4, #0x6f
275 73 01 4e TBNZ I3, #0x1, 0x24e
278 02 SEL RB 2
279 d8 01 OR I0, #0x1
27b fe 53 JMP 0x253
; entry point #61 (3, 7, 3):
27d cc 5b AND I4, #0x5b
27f f5 7e MOV I5, #0x7e
; entry point #62 (3, 7, 4):
281 fc 36 CALL 0x236
283 01 SEL RB 1
284 48 c9 a1 BEQ I8, #0xc9, 0x2a1
287 17 YIELDTO 7
; entry point #63 (3, 7, 5):
288 fc 1f CALL 0x21f
28a bb 06 TASK 3, #0x6
28c 61 80 62 TBZ I1, #0x80, 0x262
28f ff YIELD
; entry point #65 (3, 7, 7):
290 cc 5b AND I4, #0x5b
292 f5 7e MOV I5, #0x7e
294 02 SEL RB 2
295 61 04 9f TBZ I1, #0x4, 0x29f
298 18 YIELDTO 8
; entry point #16 (0, 8, 1):
299 02 SEL RB 2
29a f4 0d MOV I4, #0xd
29c ba 09 TASK 2, #0x9
29e ff YIELD
29f fc 36 CALL 0x236
2a1 1a YIELDTO 10
; entry point #66 (3, 7, 8):
2a2 00 SEL RB 0
2a3 24 MOV A, I4
2a4 04 SEL RB 4
2a5 35 MOV I5, A
2a6 fc 33 CALL 0x233
2a8 19 YIELDTO 9
; entry point #67 (3, 7, 9):
2a9 00 SEL RB 0
2aa 25 MOV A, I5
2ab 04 SEL RB 4
2ac 35 MOV I5, A
; entry point #68 (3, 7, 10):
2ad fc 2f CALL 0x22f
2af 89 a1 BPL 0x2a1
2b1 02 SEL RB 2
2b2 60 02 bd TBZ I0, #0x2, 0x2bd
2b5 1b YIELDTO 11
; entry point #69 (3, 7, 11):
2b6 02 SEL RB 2
2b7 c8 df AND I0, #0xdf
2b9 01 SEL RB 1
2ba 48 c9 cd BEQ I8, #0xc9, 0x2cd
2bd 02 SEL RB 2
2be 61 08 c5 TBZ I1, #0x8, 0x2c5
2c1 f4 0c MOV I4, #0xc
2c3 df 04 OR I7, #0x4
2c5 1c YIELDTO 12
; entry point #70 (3, 7, 12):
2c6 dc 60 OR I4, #0x60
2c8 1d YIELDTO 13
; entry point #72 (3, 7, 14):
2c9 cc db AND I4, #0xdb
2cb f5 7e MOV I5, #0x7e
2cd ba 00 TASK 2, #0x0
2cf 1f YIELDTO 15
; entry point #71 (3, 7, 13):
2d0 cc bf AND I4, #0xbf
2d2 02 SEL RB 2
2d3 70 20 d7 TBNZ I0, #0x20, 0x2d7
2d6 1e YIELDTO 14
2d7 71 04 e1 TBNZ I1, #0x4, 0x2e1
2da 71 40 e2 TBNZ I1, #0x40, 0x2e2
2dd df 20 OR I7, #0x20
2df fc 36 CALL 0x236
2e1 17 YIELDTO 7
2e2 13 YIELDTO 3
; entry point #17 (0, 8, 2):
2e3 f5 7e MOV I5, #0x7e
2e5 cc 6f AND I4, #0x6f
2e7 02 SEL RB 2
2e8 71 01 9e TBNZ I1, #0x1, 0x29e
2eb 04 SEL RB 4
2ec dc 80 OR I4, #0x80
2ee 10 YIELDTO 0
; entry point #73 (3, 7, 15):
2ef 08 SEL RB 8
2f0 aa ???
2f1 ec SYS 0, RB, A
; entry point #18 (0, 8, 3):
2f2 cc 4b AND I4, #0x4b
2f4 ba 04 TASK 2, #0x4
2f6 01 SEL RB 1
2f7 28 MOV A, I8
2f8 09 SEL RB 9
2f9 ec SYS 0, RB, A
; entry point #58 (3, 7, 0):
2fa cc db AND I4, #0xdb
; entry point #23 (0, 9, 13):
2fc fc 0f CALL 0x20f
2fe ff YIELD
; entry point #20 (0, 8, 9), (0, 8, 11):
2ff aa ???
; entry point #43 (2, 9, 0) -> (2, 9, 15):
300 0b SEL RB 11
301 ec SYS 0, RB, A
; entry point #21 (0, 9, 12):
302 f5 ff MOV I5, #0xff
304 ff YIELD
; entry point #22 (0, 9, 14):
305 f5 7e MOV I5, #0x7e
307 ff YIELD
; entry point #15 (0, 8, 0):
308 fc 3e CALL 0x33e
30a 01 SEL RB 1
30b 48 ca 11 BEQ I8, #0xca, 0x311
30e ba 01 TASK 2, #0x1
310 ff YIELD
311 02 SEL RB 2
312 f4 0d MOV I4, #0xd
314 02 SEL RB 2
315 c9 fe AND I1, #0xfe
317 04 SEL RB 4
318 dc 80 OR I4, #0x80
31a fe 23 JMP 0x323
; entry point #28 (0, 11, 9):
31c 01 SEL RB 1
31d 68 04 23 TBZ I8, #0x4, 0x323
320 ba 0b TASK 2, #0xb
322 ff YIELD
; entry point #29 (0, 11, 11):
323 02 SEL RB 2
324 70 01 2a TBNZ I0, #0x1, 0x32a
327 04 SEL RB 4
328 db 01 OR I3, #0x1
32a 02 SEL RB 2
32b df 04 OR I7, #0x4
32d 70 20 31 TBNZ I0, #0x20, 0x331
330 10 YIELDTO 0
331 12 YIELDTO 2
; entry point #19 (0, 8, 4):
332 fc 3e CALL 0x33e
334 02 SEL RB 2
335 c8 df AND I0, #0xdf
337 01 SEL RB 1
338 48 ce 14 BEQ I8, #0xce, 0x314
33b ba 09 TASK 2, #0x9
33d ff YIELD
33e 00 SEL RB 0
33f ee SYS 2, RB
; entry point #25 (0, 10, 8) -> (0, 10, 11):
340 00 SEL RB 0
341 f0 02 MOV I0, #0x2
343 38 MOV I8, A
344 58 c9 4d BNE I8, #0xc9, 0x34d
347 00 SEL RB 0
348 f1 01 MOV I1, #0x1
34a bc 00 TASK 4, #0x0
34c ff YIELD
34d 02 SEL RB 2
34e 61 04 47 TBZ I1, #0x4, 0x347
351 00 SEL RB 0
352 f1 03 MOV I1, #0x3
354 fe 4a JMP 0x34a
; entry point #24 (0, 10, 0) -> (0, 10, 3):
356 00 SEL RB 0
357 39 MOV I9, A
358 f0 0c MOV I0, #0xc
35a 49 c0 47 BEQ I9, #0xc0, 0x347
35d fe 51 JMP 0x351
35f 00 SEL RB 0
I have some confidence in the entrypoints, but it's hard to transcribe the program ROM without making mistakes, so the code itself should be treated with a degree of suspicion.
Literally none of those even seem to appear in the 8273

Although I suppose that's a little clue in itself? They might be relatively specialised.
e7 appears to get a single workout in the '3, at 12d.
Code: Select all
...
128 26 MOV A, I6
129 e6 XOR A, I6
12a 8a 31 BZ 0x131
12c 26 MOV A, I6
12d e7 XOR A, I7
12e 8a 36 BZ 0x136
130 11 YIELDTO 1
131 02 SEL RB 2
132 c8 ef AND I0, #0xef
134 fe 39 JMP 0x139
136 02 SEL RB 2
137 d8 10 OR I0, #0x10
139 01 SEL RB 1
...
Last edited by Diminished on Sat Sep 12, 2020 2:51 pm, edited 1 time in total.
- Diminished
- Posts: 598
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- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Checked my 8273 program ROM dump against the new photograph and found six errors.
I've corrected my previous post with the disassembly.
The changes to the listing are as follows:
A fixed ROM binary is here:
(I'll delete the previous one I posted.)
I've corrected my previous post with the disassembly.
The changes to the listing are as follows:
Code: Select all
0ca 5b ff d2 BNE I11, #0xff, 0x0d2
0cd aa ???
0ce 9c 0f AND A, #0xf
-0d0 89 af BPL 0x0af
+0d0 8b af BNZ 0x0af
0d2 98 0f MOV A, #0xf
; entry point #36 (2, 2, 0) -> (2, 2, 15):
0d4 01 SEL RB 1
-0d5 d8 00 OR I0, #0x0
-0d7 06 SEL RB 6
+0d5 d8 04 OR I0, #0x4
+0d7 02 SEL RB 2
0d8 34 MOV I4, A
0d9 cf df AND I7, #0xdf
0db bb 0f TASK 3, #0xf
@@ -284,7 +284,7 @@
15b 8b a9 BNZ 0x1a9
15d 00 SEL RB 0
15e 27 MOV A, I7
-15f 0a SEL RB 10
+15f 02 SEL RB 2
160 df 10 OR I7, #0x10
162 32 MOV I2, A
163 d8 04 OR I0, #0x4
@@ -697,6 +697,6 @@
357 39 MOV I9, A
358 f0 0c MOV I0, #0xc
35a 49 c0 47 BEQ I9, #0xc0, 0x347
-35d f6 59 MOV I6, #0x59
+35d fe 51 JMP 0x351
35f 00 SEL RB 0
(I'll delete the previous one I posted.)
- BeebMaster
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- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
What happened next? Or have all the secrets of the world's finest floppy disc controller been discovered now?
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I've been preoccupied with preparing various bits of teletext stuff for the upcoming virtual block party event, which is why I've not made any progress on the vectorising for a while (also getting ill
).
Hopefully I can give it some attention again next month.

Hopefully I can give it some attention again next month.
Various teletext things including a web based teletext editor which can export as mode 7 screens.
Join the Teletext Discord for teletext chat.
Join the Teletext Discord for teletext chat.
- scarybeasts
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I'm still working on this and do intend to drive it to some form of resolution. Certainly some blog posts.
I did rewrite beebjit's 8271 driver based on the ROM disassembly, and accordingly it now handles things like "bad tracks" correctly.
I've managed to get the 8271 to read sectors it cannot normally read. To finish up, I'm trying to get a few examples of writing things the 8271 cannot normally write.
Cheers
Chris
I did rewrite beebjit's 8271 driver based on the ROM disassembly, and accordingly it now handles things like "bad tracks" correctly.
I've managed to get the 8271 to read sectors it cannot normally read. To finish up, I'm trying to get a few examples of writing things the 8271 cannot normally write.
Cheers
Chris
- BeebMaster
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- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Ooo this sounds good - is the code going to be in a form that can be used on a Beeb?
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Sounds very interesting indeed!scarybeasts wrote: ↑Thu Oct 15, 2020 8:28 pm...some blog posts.
...
I've managed to get the 8271 to read sectors it cannot normally read.
...
... writing things the 8271 cannot normally write.
- scarybeasts
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- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Are you referring to making the 8271 do things it "shouldn't" be able to?BeebMaster wrote: ↑Thu Oct 15, 2020 8:30 pmOoo this sounds good - is the code going to be in a form that can be used on a Beeb?
Cheers
Chris
- BeebMaster
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- Joined: Sun Aug 02, 2009 5:59 pm
- Location: Lost in the BeebVault!
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Yes I am. Are you testing this stuff with an 8271 in a Beeb, or somewhere else? Or is it even all theoretical as yet?
- scarybeasts
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- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I'm testing in a real model B with 8271. So far, some simple but weird tests I've done are matching results predicted from the ROM source code (i.e. commands with the "wrong" parameter count bit mask, etc.)BeebMaster wrote: ↑Fri Oct 16, 2020 4:41 pmYes I am. Are you testing this stuff with an 8271 in a Beeb, or somewhere else? Or is it even all theoretical as yet?
I'll release any little demo programs I make. Not sure any of them will be useful, but there will be some simple demos of "impossible" things.
Cheers
Chris
- scarybeasts
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- Joined: Tue Feb 06, 2018 7:44 am
- Contact:
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I'm curious if there's any particular tooling you'd like to see?BeebMaster wrote: ↑Thu Oct 15, 2020 8:30 pmOoo this sounds good - is the code going to be in a form that can be used on a Beeb?
I've hacked together a "write track" type of functionality for the 8271. It's incomplete, buggy, and frankly rickety but it did just manage to write out a copy of "The Sentinel", which is something I believe Disc Duplicator III / Enigma / ADI never managed.
I'm not sure I have the energy to productionize it further, but I will be writing a blog post about the journey!
Cheers
Chris
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I'd not got any specific in mind, but if it can be shown to do something that it isn't supposed to be able to do, I think that would be interesting.
Or maybe I can set a challenge...the data sheet says it supports (albeit for 8" discs) 15 sectors per track at 256 bytes per sector. That's a 50% increase on DFS disc capacity, and is very close to ADFS capacity. Maybe with a bit of persuasion it could read a 16spt ADFS disc?
Or maybe I can set a challenge...the data sheet says it supports (albeit for 8" discs) 15 sectors per track at 256 bytes per sector. That's a 50% increase on DFS disc capacity, and is very close to ADFS capacity. Maybe with a bit of persuasion it could read a 16spt ADFS disc?
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
I don't think this is likely, unfortunately. ADFS discs use MFM coding which is very different and there are not likely to be tricks to read it.BeebMaster wrote: ↑Thu Oct 22, 2020 5:43 pmOr maybe I can set a challenge...the data sheet says it supports (albeit for 8" discs) 15 sectors per track at 256 bytes per sector. That's a 50% increase on DFS disc capacity, and is very close to ADFS capacity. Maybe with a bit of persuasion it could read a 16spt ADFS disc?
In the 8" disc case with 15x256, I believe that's still plain old FM encoding, but the 8271 has to be clocked higher than it is in the beeb.
Cheers
Chris
Re: 8271 disc controller de-cap and craziness -- do not try this at home!
Bump! (Good-natured prompt, of course, no trace of entitlement...)
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Re: 8271 disc controller de-cap and craziness -- do not try this at home!
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