Superbrain #3 : The Superbrain II board

[jonb]

Hi

I just can't seem to get enough of these Superbrains. This time I'm looking at a Superbrain II which Talywain has sent me.

As it is just the main board I have two options:

• Source PSU, drives, screen, serial connectors and build it into a home made or other non Superbrain case.
• Build an adapter to enable it to be fitted to my SB I chassis.

I'm leaning towards the first as it is more fun. I'm pretty sure I can scavenge a display from a PCW9512 (or I could build a video mixer and connect to a monitor via composite) and the PSU is easy - a MeanWell RQ-50B should do the trick - famous last words..

First off, then, is the power connector.

Can anyone identify what type it is?

Note the raised flange that locks it into place. I need two female connectors to plug into these PCB headers. One carries power, the other carries the video signals.

[jonb]

Hmm, After lots of searching about I think they are Molex KK396 type.

https://www.ebay.co.uk/itm/232550970841/

I've ordered some so we will soon see..

[jonb]

Note to our beloved wives: This is why we do not throw out old electronics "junk":

Astek PSU

..despite the RIFA caps waiting to release the "magic smoke".

I think this should be able to run the board. 12v 4A, +5v 2A, +-5v .5A outputs, plus one more that may (or may not) be connected. I'll test it.

[jonb]

The Astek has a number of outputs:

• V1: +12v connected with the common rail.
• V2: +5v connected with the common rail.
• V3: +-5V. There are two pins, positive and negative and they are isolated from the common rail.
• V4: +-12v. Same as V3 WRT the common rail.

If my understanding of this PSU is correct, I should be able to connect V3 +5v to the common rail, then the V3 -5v pin will be relative to common (which is what the Superbrain needs). I did a quick test with dummy loads across V1 and V2, and it looks like it is working. In addition, I found some KK396 housings and crimp pins in a box (these came with the Intel MDS 230) so I just need to find some suitable wire (always a challenge) and I can build a power cable...

[1024MAK]

Yes, if you tie one side of a floating output from a SMPSU to the common (0V/“GND”), the other output of the pair will be either positive or negative relative to the common depending on which side is connected to common.

So if you connect the positive to common, the negative will be negative with respect to common.

Good luck

Mark

[jonb]

Thanks Mark!

And so, after some faffing about, we have a cable:

The wires are:-

• Blue: +5v
• White: -5v
• Brown: +12v
• Green: -12v
• Black: Common / GND

..but I'll double check that lot before powering up.

BOOM!

[1024MAK]

That colour code sounds like it is similar to that used in a cheap China made bit of electronics...!

If you think it may go with please do video it

Mark

[jonb]

I've checked the voltages and they all look good.

No smoke, yet! Just need to double check the wiring to the SB II and I might think about powering up (with a Z80 ICE connected so I can see what's going on).

I am a little bit concerned about the current requirements, though - the negative rails are only rated for .5A. Unlikely that's a problem for the -12v rail, but -5v goes to all the DRAMs, 32 of them. I wonder if .5A is enough. Better check the datasheet. I have the Intertec schematic pack here, but it says nothing about current ratings. All rails of the Superbrain II PSU have 5A fuses, though..

[Edit: Mostek datasheet says average draw is 200uA at VBB (the -5v input) so I think I'm OK..]

[jonb]

Well I'll be a monkey's uncle...

Code: Select all

Z80 ICE V0.72 Jun 21, 2011 R. Grieb/Tauntek

OK ===> l
0000 3A 00 88       LD A,(8800)
0003 FE 55          CP 55
0005 C2 13 00       JP NZ,0013
0008 3A 01 88       LD A,(8801)
000B FE AA          CP AA
000D C2 13 00       JP NZ,0013
0010 C3 21 00       JP 0021
0013 21 00 04       LD HL,0400
0016 11 00 C0       LD DE,C000
0019 01 00 04       LD BC,0400
001C ED B0          LDIR
001E C3 06 C0       JP C006
0021 31 FF 8B       LD SP,8BFF
0024 3E 00          LD A,00
0026 32 00 88       LD (8800),A
0029 32 01 88       LD (8801),A
002C 32 07 88       LD (8807),A
002F 32 06 88       LD (8806),A
0032 D3 10          OUT (10),A

OK ===> g

Execution Begins At ===> 0000

OK ===> q

..H...  A=E0  BC=0000  DE=0000  HL=8805  S=F3FD  P=C2E6  AND 20
...... A'=00  B'=0000  D'=0000  H'=0000  X=0000  Y=0000  I=00

Err ===> d f800

F800   34 2E 32 20 20 20 49 4E-53 45 52 54 20 44 49 53    4.2   INSERT DIS
F810   4B 45 54 54 45 20 49 4E-54 4F 20 44 52 49 56 45    KETTE INTO DRIVE
F820   20 41 20 20 20 20 20 20-20 20 20 20 20 20 20 20     A
F830   20 20 20 20 20 20 20 20-20 20 20 20 20 20 20 20
F840   20 20 20 20 20 20 20 20-20 20 20 20 20 20 20 20
F850   20 20 20 20 20 20 20 20-20 20 20 20 20 20 20 20
F860   20 20 20 20 20 20 20 20-20 20 20 20 20 20 20 20
F870   20 20 20 20 20 20 20 20-20 20 20 20 20 20 20 20

OK ===>

Errm... Looks good so far. F800 is the location of the screen memory, and I can see it is showing a boot prompt!

It's not all good news though:

Code: Select all

OK ===> md

0000000000000000111111111111111122222222222222223333333333333333
0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF
RRRRRRRRRRRRRRRRRRRRRR RRR RRRRR R R     R    RRRRRRRRRRRRRRRRRR
WWWWWWWWWWWWWWWWWWWWWW WWW WWWWW W W     W    WWWWWWWWWWWWWWWWWW
0000000000000000111111 111 11111 2 2     2    223333333333333333
0123456789ABCDEF012345 789 BCDEF 1 3     9    EF0123456789ABCDEF

Holes in the memory...

[jonb]

Trying to boot it now. There are disk (sub)system problems. The drive activity light comes on as expected, then nothing. I can see the boot code is waiting for the disk "busy" line to go low, but this doesn't happen. May be a stuck gate or a problem with the PIO chip (which provides the busy line on Port 69h, bit 5)...

Maybe I should put that to one side for now and build a video board. I have H-SYNC, V-SYNC and VIDEO signals to combine into composite. Is there an easy way to combine these into composite video? I should say I've come across a few schematics on the web but I'm not sure which way is best.

[jonb]

Found a couple of sync combiners:

Very simple

syncadd.png (1.6 KiB) Viewed 3360 times

Bit more complex

Which I would then pass into my existing PCW video mixer with the SB II's Video input:

A video mixer for the PCW

Not sure it'll work. The video mixer does but the sync combiner's a bit of an unknown..

[1024MAK]

My sync combiner is in this thread

This is a cut down version of a more complex circuit, which is in the same thread.

Mark

[Talywain]

Wow. You’ve been busy. As for the disk busy signal, could it be a density select issue i.e 360 KB low density, 160 KB single sided and 1.2 MB high density.

I've seen things you people wouldn't believe. Computer peripherals hand carved by the fairest of artisans from the purest of silicon. A 5MB hard disk drive costing $3750 from Corvus Systems. All those moments will be lost in time, like tears in rain. Time to buy (another 1TB Flash Drive for £10 off the net).

[img/]https://drive.google.com/file/d/1MrYecH ... haring[img]

And no, it isn’t something I edited using MSPaint whilst not wearing my glasses.

http://www.classiccmp.org/cpmarchives/c ... 981-06.pdf

[Talywain]

Damn, it’s been a while since I used [img] tags. Can’t seem to find the correct format.

[1024MAK]

Image tags will only work if the supplied URL resolves to an recognised image, e.g. “.jpg”. It will not work if the URL resolves to a .htm / .html page.

Instead either link to the actual picture, or use the URL tags.

Both the image and the URL tags are available via the icons above the edit box.

Mark

[jonb]

Wow. You’ve been busy. As for the disk busy signal, could it be a density select issue i.e 360 KB low density, 160 KB single sided and 1.2 MB high density.

I've just skipped through the Interface Age PDF you linked to and it's a very nostalgic thing. Especially the advertisements. I think this period of computing was the most interesting; the proliferation of machines, peripherals and software was indicative of a rapidly expanding industry. Maybe that is why we all think of it as a special time.

Regarding SBII board progress, a degree of enthusiasm helps! Plus, I have the Intertec schematic pack which covers this board and the previous Superbrain I as well as the other modules (like the hard disk adapter). Once I have it booting I am planning to build a case for it, but as ever the electronics come first.

The boot ROM (which has a label on it: "SB II SB4.2", a reference to the ROM version (which matches what it prints in the screen memory at start up). This is the latest ROM I have seen (4.003 being the previous most recent) and I will dump it and upload to VCF, where there is a thread that discusses SB ROMs. It appears to be intact - SBs seem to be susceptible to bit rot in their boot ROMs, maybe because they are unusual TMS2716 parts.

The drives connected are DS/DD 3.5" but I also tried with SS/DD 5.25" as well. It didn't occur to me that this might be a Superbrain II SD (they were named JR, QD and SD in ascending order of drive capacity) but it has an SAB 1793 FDC which is SD or DD capable, so I think disk density is not a problem here. I'm using a DS/DD disk and it should be able to read the boot tracks at least.

There is a discrepancy here. The Intertec schematic says the FDC should be an SAB 1791 and the data sheet says the difference between that and a 1793 is that the 1793 uses an inverted databus. So I'm going to swap it out for a 1791 first. Probably won't help but let's see..

[Edit: No, still waiting for busy. So the FDD wasn't the problem.]

[jonb]

My sync combiner is in this thread

This is a cut down version of a more complex circuit, which is in the same thread.

Mark

That'll do, I expect. As will Xenon - the very best computer game music, ever.

[Pernod]

The boot ROM (which has a label on it: "SB II SB4.2", a reference to the ROM version (which matches what it prints in the screen memory at start up). This is the latest ROM I have seen (4.003 being the previous most recent) and I will dump it and upload to VCF, where there is a thread that discusses SB ROMs.

I don't visit VCF regularly, so could you let me know when it's there, or post it here too. Thanks.

[jonb]

Why, have you got a Superbrain too?

[Pernod]

Why, have you got a Superbrain too?

No, to add support in MAME.

[jonb]

Knew it was too good to be true. There are too many faulty DRAM cells for it to boot. Whether that is the memory or the PSU not having enough current on the negative rails, I do not know at the moment. I think the think to do would be to replace a bank of DRAM (Bank 3, C000-FFFF) and see if I can get that stable.

[1024MAK]

If the -5V supply was current starving the DRAM, the voltage would rise towards the 0V line. Yes, I know that sounds odd!

But as the -5V is just a bias voltage for the substrate, I don’t think that is the problem. Still worthwhile tested selected DRAM chips to check all three supply voltages on their pins though.

These 4116 DRAM (and equivalents) draw most of the power they need from the +12V rail.

I’m assuming that they are 16k one bit wide DRAM and not the earlier 8K one bit wide DRAM...

Mark

[jonb]

Yes, Mark.. Mostek MK4116Ns. I have a stack of dodgy ebay copies here - u256D - so I can repair the top bank then take it from there.

Come to think of it, I may as well desolder the lot.

[jonb]

Some further testing indicates the contents of memory are getting corrupted seemingly at random.

When the SB boots, the ROM resides at 0000h and it copies 400h bytes of code from 400h to C000h - this is the FDD bootstrap code. On copying this with the ICE then performing successive verify operations (compare ROM with RAM copy), I get different results each time. There is not more than say 50 discrepancies, and sometimes as few as 6, but the list seems to get longer with each verify. I'm not sure if this is related by elapsed time since write or number of successive reads, but it looks like it is time related (insofar as the list of discrepancies only ever gets longer).

Here's an example with < 1 second between each successive verify:

Code: Select all

OK ===> m 400 800 c000

OK ===> v 400 800 c000
06E0 ---> 20 A0
0770 ---> 00 80
07F0 ---> 00 80

OK ===> v 400 800 c000
0470 ---> 19 99
0478 ---> C0 40
0578 ---> 0D 8D
05F8 ---> 30 B0
06E0 ---> 20 A0
0770 ---> 00 80
07F0 ---> 00 80
07F8 ---> 45 C5

OK ===> v 400 800 c000
0470 ---> 19 99
0478 ---> C0 40
04F8 ---> 01 81
04FF ---> 80 00
0578 ---> 0D 8D
05F8 ---> 30 B0
0678 ---> 06 86
06E0 ---> 20 A0
0770 ---> 00 80
0778 ---> 00 80
07F0 ---> 00 80
07F8 ---> 45 C5

OK ===> v 400 800 c000
041F ---> 32 72
042E ---> 68 28
0434 ---> 08 28
0470 ---> 19 99
049F ---> E5 A5
04D6 ---> CD C5
04F8 ---> 01 81
04FF ---> 80 00
0534 ---> C2 82
0578 ---> 0D 8D
059F ---> C3 83
05F8 ---> 30 B0
0629 ---> 03 83
0634 ---> D3 93
0636 ---> C9 E9
0670 ---> 06 86
0678 ---> 06 86
069F ---> 23 63
06A9 ---> 3E BE
06B4 ---> C2 A2
06B6 ---> 08 28
06D6 ---> 8A 82
06E0 ---> 20 A0
0770 ---> 00 80
0778 ---> 00 80
07F0 ---> 00 80
07F8 ---> 45 C5

OK ===>

I have managed a copy / verify with no errors. Second verify had 4 errors. Third had more, and so on.

Could it be a refresh problem?

[1024MAK]

If it is a refresh problem, corruption will occur faster if the CPU is halted and you wait a while before testing.

Mark

[jonb]

OK, I'll test it some more.

(By the way, the ICE does perform refreshes while the CPU is halted - it's not really "halt" state, more like it is executing NOPS. From the ICE manual: When the ICE is in Quit mode, the Z80 executes bursts of NOP instructions to provide for refresh of any DRAM present in the target system. Quit mode is the name it uses for the state it's in when the CPU isn't running at full speed and can be single stepped; effectively halted. You can disable refresh behaviour and this is what I thought might be going on, but re-enabling it made no difference.)

[1024MAK]

Yes, it’s just kinda replicating a real Z80. The difference being that a real Z80 keeps fetching the same instruction during HALT. As it’s still doing an instruction fetch, a refresh cycle occurs after the instruction fetch. But because the Z80 address is not incremented, the Z80 just sticks at the same point.

So if there is a refresh problem with any DRAM present in the system, the data in this RAM will suffer from bit rot as the DRAM cells corrupt themselves. The longer the time period, the more bits will become corrupted. And as the Z80 is halted, it can’t be program execution that is doing it.

It could still be a fault with one or more address lines floating at random voltage levels (faulty buffer) or partial shorts between them and other signals. Or if only some DRAM is affected, faulty DRAM.

Mark

[jonb]

We'll see. I've ordered a new bank of DRAM chips. 8 of them, £10. Arrgh. There must be a better way - I was wondering if the Spectrum lower RAM replacement board could be modified to fit, but it's more expensive.

Other thing I noticed, was that successive tests gave different errors; meaning by that, that the first set of errors aren't necessarily present in the next set. You know I'm no expert on DRAMs but it's sort of logical to me to assume that a damaged chip would fail in a repeatable fashion.

This problem is reminiscent of the one I faced with the other board (viewtopic.php?f=45&t=13598).

[Talywain]

Assuming you don’t need to keep the board original, how about adding an alternative memory?
I know I haven’t thrown out my stock of Cyclone III FPGA’s. I know there used to be a graphics board and from looking at a schematic on the net all the required signals are on J1.
It’s been a while since I have worked with it but if I got the arithmetic correct the FPGA on its own has 1MB of 8 bit memory.
Here’s one of my projects. On the pic there is a STM32F429 (180MHz, 32MB SDRAM) and Cyclone III (400MHz, 256K SRAM). The reverse of the board is a copy, so two of each.

[jonb]

I don't think you can use J1 for memory expansion (or to replace on board memory) because it doesn't have /MREQ. Moreover, it doesn't have any of the paging signals that the Superbrain uses to switch the ROM and disk buffer page in/out of CPU1's map. I was thinking that the four banks would have to be replaced with four separate daughter boards, such as the Spectrum lower RAM replacement board (see http://zx.zigg.net/LRR/), but that actually costs more than a set of 4116 DRAMs and there's no guarantee I could get it to work.

In the meantime I ordered a set of 8 new 4116 DRAMs. I plan on getting the upper bank working first as that is where the boot ROM copies the startup code (and the screen RAM is at the top of this bank, too). This is hopefully going to show if the DRAM is flaky or there is something else going on (with refresh or some other part of the circuit). I took the bank out and fitted sockets and have been trying to substitute other 4116s guided by memory test results, but I found these test results are not repeatable... so I begin to suspect that something else is afoot.