6522 VIA emulation: ACR writes vs. timer expiry

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scarybeasts
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6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Mon Dec 31, 2018 11:30 pm

Hi,

These two cases are interesting, they write to ACR to change the timer from continuous mode to one-shot mode (and visa versa) at the same time the timer is expiring. Except for jsbeeb, the write seems to take effect before the timer fire logic runs.

Tests cases are VIA.AC2 and VIA.AC3 in the SSD, or also pasted inline below. Once some kindly soul has run these, it's possible I'm getting low on test cases, at least for core functionality :-)


Cheers
Chris

VIA.AC2

Code: Select all

   10 REM RESULTS FROM DEC 2018
   20 PRINT "VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #1?"
   30 DIM MC% 100
   40 DIM R% 16
   50 P% = MC%
   60 [ 
   70 OPT 3 
   80 SEI
   90 LDA #&7F
  100 STA &FE6E
  110 LDA #&00
  120 STA &FE6B
  130 LDA #&02
  140 STA &FE64
  150 LDA #&00
  160 STA &FE65
  170 LDA #&40
  180 STA &FE6B
  190 LDA &FE64
  200 STA R%
  210 LDA &FE6D
  220 STA R%+1
  230 CLI
  240 RTS
  250 ] 
  260 CALL MC%
  270 REM B-EM: YES: 0, 64
  280 REM B2: YES: 0, 64
  290 REM BEEBEM: YES: 0, 64
  300 REM JSBEEB: NO: 0, 0 
  310 REM MAME: NO: 253, 0 
  320 PRINT ?(R%)
  330 PRINT ?(R%+1)
VIA.AC3

Code: Select all

   10 REM RESULTS FROM DEC 2018
   20 PRINT "VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #2?"
   30 DIM MC% 100
   40 DIM R% 16
   50 P% = MC%
   60 [ 
   70 OPT 3 
   80 SEI
   90 LDA #&7F
  100 STA &FE6E
  110 LDA #&40
  120 STA &FE6B
  130 LDA #&02
  140 STA &FE64
  150 LDA #&00
  160 STA &FE65
  170 LDA #&00
  180 STA &FE6B
  190 LDA &FE64
  200 STA R%
  210 LDA &FE6D
  220 STA R%+1
  230 CLI
  240 RTS
  250 ] 
  260 CALL MC%
  270 REM B-EM: YES: 0, 0 
  280 REM B2: YES: 0, 0 
  290 REM BEEBEM: YES: 0, 0 
  300 REM JSBEEB: NO: 0, 64
  310 REM MAME: YES: 255, 0 
  320 PRINT ?(R%)
  330 PRINT ?(R%+1)
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BigEd
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by BigEd » Tue Jan 01, 2019 10:34 am

On my Beeb, (Rockwell R6522P, datecodes 8243 and 8304) both cases return 0,0 - see below.

(This is one of several related threads: )

Code: Select all

>RUN
VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #1?
1B18          
1B18          OPT 3 
1B18 78       SEI
1B19 A9 7F    LDA #&7F
1B1B 8D 6E FE STA &FE6E
1B1E A9 00    LDA #&00
1B20 8D 6B FE STA &FE6B
1B23 A9 02    LDA #&02
1B25 8D 64 FE STA &FE64
1B28 A9 00    LDA #&00
1B2A 8D 65 FE STA &FE65
1B2D A9 40    LDA #&40
1B2F 8D 6B FE STA &FE6B
1B32 AD 64 FE LDA &FE64
1B35 8D 7D 1B STA R%
1B38 AD 6D FE LDA &FE6D
1B3B 8D 7E 1B STA R%+1
1B3E 58       CLI
1B3F 60       RTS
         0
         0
>NEW
>   10 REM RESULTS FROM DEC 2018
>   20 PRINT "VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #2?"
>   30 DIM MC% 100
>   40 DIM R% 16
>   50 P% = MC%
>   60 [ 
>   70 OPT 3 
>   80 SEI
>   90 LDA #&7F
>  100 STA &FE6E
>  110 LDA #&40
>  120 STA &FE6B
>  130 LDA #&02
>  140 STA &FE64
>  150 LDA #&00
>  160 STA &FE65
>  170 LDA #&00
>  180 STA &FE6B
>  190 LDA &FE64
>  200 STA R%
>  210 LDA &FE6D
>  220 STA R%+1
>  230 CLI
>  240 RTS
>  250 ] 
>  260 CALL MC%
>  270 REM B-EM: YES: 0, 0 
>  280 REM B2: YES: 0, 0 
>  290 REM BEEBEM: YES: 0, 0 
>  300 REM JSBEEB: NO: 0, 64
>  310 REM MAME: YES: 255, 0 
>  320 PRINT ?(R%)
>  330 PRINT ?(R%+1)
>RUN
VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #2?
1B19          
1B19          OPT 3 
1B19 78       SEI
1B1A A9 7F    LDA #&7F
1B1C 8D 6E FE STA &FE6E
1B1F A9 40    LDA #&40
1B21 8D 6B FE STA &FE6B
1B24 A9 02    LDA #&02
1B26 8D 64 FE STA &FE64
1B29 A9 00    LDA #&00
1B2B 8D 65 FE STA &FE65
1B2E A9 00    LDA #&00
1B30 8D 6B FE STA &FE6B
1B33 AD 64 FE LDA &FE64
1B36 8D 7E 1B STA R%
1B39 AD 6D FE LDA &FE6D
1B3C 8D 7F 1B STA R%+1
1B3F 58       CLI
1B40 60       RTS
         0
         0
>

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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Wed Jan 02, 2019 6:42 am

BigEd wrote:
Tue Jan 01, 2019 10:34 am
On my Beeb, (Rockwell R6522P, datecodes 8243 and 8304) both cases return 0,0 - see below.
Hi BigEd,

Happy New Year! May it bring lots of beeb tinkering :-)

That's definitely an unexpected result but that makes it interesting. None of the emulators return 0,0 for both test cases. Would it be an imposition to run the extra two tests, VIA.AC4 and VIA.AC5? They try to test only ACR flip behavior a bit more thoroughly and not mix in crazy timing.


Cheers
Chris

VIA.AC4

Code: Select all

   10 REM RESULTS FROM DEC 2018
   20 PRINT "VIA TEST: FLIP ACR MODE TO ONE-SHOT AFTER EXPIRY, DOES IT IRQ?"
   30 DIM MC% 256
   40 DIM R% 16
   50 P% = MC%
   60 [
   70 OPT 3
   80 SEI
   90 LDA #&7F
  100 STA &FE6E
  110 LDA #&40
  120 STA &FE6B
  130 LDA #10
  140 STA &FE64
  150 LDA #&00
  160 STA &FE65
  170 LDA &FE6D
  180 STA R%
  190 LDA &FE64
  200 STA R%+1
  210 NOP
  220 NOP
  230 LDA &FE6D
  240 STA R%+2
  250 LDA &FE64
  260 STA R%+3
  270 NOP
  280 NOP
  290 LDA &FE6D
  300 STA R%+4
  310 LDA &FE64
  320 STA R%+5
  330 NOP
  340 NOP
  350 LDA #&00
  360 STA &FE6B
  370 NOP
  380 NOP
  390 NOP
  400 NOP
  410 NOP
  420 NOP
  430 NOP
  440 NOP
  450 LDA &FE6D
  460 STA R%+6
  470 LDA &FE64
  480 STA R%+7
  490 NOP
  500 NOP
  510 LDA &FE6D
  520 STA R%+8
  530 LDA &FE64
  540 STA R%+9
  550 CLI
  560 RTS
  570 ]
  580 CALL MC%
  590 PRINT ?(R%)
  600 PRINT ?(R%+1)
  610 PRINT ?(R%+2)
  620 PRINT ?(R%+3)
  630 PRINT ?(R%+4)
  640 PRINT ?(R%+5)
  650 PRINT ?(R%+6)
  660 PRINT ?(R%+7)
  670 PRINT ?(R%+8)
  680 PRINT ?(R%+9)
VIA.AC5

Code: Select all

   10 REM RESULTS FROM DEC 2018
   20 PRINT "VIA TEST: FLIP ACR MODE TO CONT AFTER EXPIRY, DOES IT IRQ?"
   30 DIM MC% 256
   40 DIM R% 16
   50 P% = MC%
   60 [
   70 OPT 3
   80 SEI
   90 LDA #&7F
  100 STA &FE6E
  110 LDA #&00
  120 STA &FE6B
  130 LDA #10
  140 STA &FE64
  150 LDA #&00
  160 STA &FE65
  170 LDA &FE6D
  180 STA R%
  190 LDA &FE64
  200 STA R%+1
  210 NOP
  220 NOP
  230 LDA &FE6D
  240 STA R%+2
  250 LDA &FE64
  260 STA R%+3
  270 NOP
  280 NOP
  290 LDA &FE6D
  300 STA R%+4
  310 LDA &FE64
  320 STA R%+5
  330 NOP
  340 NOP
  350 LDA #&40
  360 STA &FE6B
  370 NOP
  380 NOP
  390 NOP
  400 NOP
  410 NOP
  420 NOP
  430 NOP
  440 NOP
  450 LDA &FE6D
  460 STA R%+6
  470 LDA &FE64
  480 STA R%+7
  490 NOP
  500 NOP
  510 LDA &FE6D
  520 STA R%+8
  530 LDA &FE64
  540 STA R%+9
  550 CLI
  560 RTS
  570 ]
  580 CALL MC%
  590 PRINT ?(R%)
  600 PRINT ?(R%+1)
  610 PRINT ?(R%+2)
  620 PRINT ?(R%+3)
  630 PRINT ?(R%+4)
  640 PRINT ?(R%+5)
  650 PRINT ?(R%+6)
  660 PRINT ?(R%+7)
  670 PRINT ?(R%+8)
  680 PRINT ?(R%+9)
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BigEd
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by BigEd » Wed Jan 02, 2019 7:51 am

Here you go:

Code: Select all

>RUN
VIA TEST: FLIP ACR MODE TO ONE-SHOT AFTER EXPIRY, DOES IT IRQ?
1C69          
1C69          OPT 3
1C69 78       SEI
1C6A A9 7F    LDA #&7F
1C6C 8D 6E FE STA &FE6E
1C6F A9 40    LDA #&40
1C71 8D 6B FE STA &FE6B
1C74 A9 0A    LDA #10
1C76 8D 64 FE STA &FE64
1C79 A9 00    LDA #&00
1C7B 8D 65 FE STA &FE65
1C7E AD 6D FE LDA &FE6D
1C81 8D 6A 1D STA R%
1C84 AD 64 FE LDA &FE64
1C87 8D 6B 1D STA R%+1
1C8A EA       NOP
1C8B EA       NOP
1C8C AD 6D FE LDA &FE6D
1C8F 8D 6C 1D STA R%+2
1C92 AD 64 FE LDA &FE64
1C95 8D 6D 1D STA R%+3
1C98 EA       NOP
1C99 EA       NOP
1C9A AD 6D FE LDA &FE6D
1C9D 8D 6E 1D STA R%+4
1CA0 AD 64 FE LDA &FE64
1CA3 8D 6F 1D STA R%+5
1CA6 EA       NOP
1CA7 EA       NOP
1CA8 A9 00    LDA #&00
1CAA 8D 6B FE STA &FE6B
1CAD EA       NOP
1CAE EA       NOP
1CAF EA       NOP
1CB0 EA       NOP
1CB1 EA       NOP
1CB2 EA       NOP
1CB3 EA       NOP
1CB4 EA       NOP
1CB5 AD 6D FE LDA &FE6D
1CB8 8D 70 1D STA R%+6
1CBB AD 64 FE LDA &FE64
1CBE 8D 71 1D STA R%+7
1CC1 EA       NOP
1CC2 EA       NOP
1CC3 AD 6D FE LDA &FE6D
1CC6 8D 72 1D STA R%+8
1CC9 AD 64 FE LDA &FE64
1CCC 8D 73 1D STA R%+9
1CCF 58       CLI
1CD0 60       RTS
         0
         3
        64
         3
        64
         3
        64
         3
         0
         3
>

Code: Select all

>RUN
VIA TEST: FLIP ACR MODE TO CONT AFTER EXPIRY, DOES IT IRQ?
1C65          
1C65          OPT 3
1C65 78       SEI
1C66 A9 7F    LDA #&7F
1C68 8D 6E FE STA &FE6E
1C6B A9 00    LDA #&00
1C6D 8D 6B FE STA &FE6B
1C70 A9 0A    LDA #10
1C72 8D 64 FE STA &FE64
1C75 A9 00    LDA #&00
1C77 8D 65 FE STA &FE65
1C7A AD 6D FE LDA &FE6D
1C7D 8D 66 1D STA R%
1C80 AD 64 FE LDA &FE64
1C83 8D 67 1D STA R%+1
1C86 EA       NOP
1C87 EA       NOP
1C88 AD 6D FE LDA &FE6D
1C8B 8D 68 1D STA R%+2
1C8E AD 64 FE LDA &FE64
1C91 8D 69 1D STA R%+3
1C94 EA       NOP
1C95 EA       NOP
1C96 AD 6D FE LDA &FE6D
1C99 8D 6A 1D STA R%+4
1C9C AD 64 FE LDA &FE64
1C9F 8D 6B 1D STA R%+5
1CA2 EA       NOP
1CA3 EA       NOP
1CA4 A9 40    LDA #&40
1CA6 8D 6B FE STA &FE6B
1CA9 EA       NOP
1CAA EA       NOP
1CAB EA       NOP
1CAC EA       NOP
1CAD EA       NOP
1CAE EA       NOP
1CAF EA       NOP
1CB0 EA       NOP
1CB1 AD 6D FE LDA &FE6D
1CB4 8D 6C 1D STA R%+6
1CB7 AD 64 FE LDA &FE64
1CBA 8D 6D 1D STA R%+7
1CBD EA       NOP
1CBE EA       NOP
1CBF AD 6D FE LDA &FE6D
1CC2 8D 6E 1D STA R%+8
1CC5 AD 64 FE LDA &FE64
1CC8 8D 6F 1D STA R%+9
1CCB 58       CLI
1CCC 60       RTS
         0
         3
        64
         3
         0
         3
         0
         3
         0
         3
>

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BigEd
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by BigEd » Wed Jan 02, 2019 7:53 am

And indeed, Happy New Year!

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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Wed Jan 02, 2019 8:17 am

BigEd wrote:
Wed Jan 02, 2019 7:51 am
Here you go:
Thanks! This is as expected. jsbeeb and b-em nail both of those tests (b2 needs to not re-arm the timer on a flip from one-shot to continuous). There must be something timing related going on, or maybe my original test cases had a bug. I'll go away and study them some more.


Cheers
Chris

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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Fri Jan 04, 2019 10:52 am

BigEd wrote:
Wed Jan 02, 2019 7:51 am
Here you go:
Ok, here's my (final?) attempt to shed light on the weird asymmetric behavior of ACR write vs. timer interrupt. These two test cases are kind of behemoths now (VIA.AC6, VIA.AC7) but if BigEd or some other kind soul ran these, we might learn a bit more for how emulators should behave in corner cases.

Bonus test: what does "PRINT ?&FE6A" say after a fresh power on? I read one resource that thinks SR might be initialized to $FF, but others say $00.


Cheers
Chris

VIA.AC6

Code: Select all

   10 REM RESULTS FROM JAN 2019
   20 PRINT "VIA TEST: GETTING TO THE BOTTOM OF ACR WRITE AT IRQ TIME #1"
   30 DIM MC% 256
   40 DIM R% 16
   50 P% = MC%
   60 [
   70 OPT 0
   80 SEI
   90 LDA #&7F
  100 STA &FE6E
  110 LDA #6
  120 STA &FE64
  130
  140 LDA #&40
  150 STA &FE6B
  160 LDA #&00
  170 STA &FE65
  180
  190 LDA #&00
  200 STA &FE6B
  210 NOP : NOP : NOP : NOP
  220 LDA &FE6D
  230 LDY &FE64
  240 NOP : NOP
  250 LDX &FE6D
  260 LDY &FE64
  270 STA R%
  280 STX R%+1
  290 STY R%+2
  300
  310 LDA #&40
  320 STA &FE6B
  330 LDA #&00
  340 STA &FE65
  350
  360 LDA #&00
  370 NOP : NOP : NOP : NOP
  380 STA &FE6B
  390 LDA &FE6D
  400 LDY &FE64
  410 NOP : NOP
  420 LDX &FE6D
  430 LDY &FE64
  440 STA R%+3
  450 STX R%+4
  460 STY R%+5
  470
  480 LDA #&40
  490 STA &FE6B
  500 LDA #&00
  510 STA &FE65
  520
  530 LDA #&00
  540 NOP : NOP : NOP
  550 STA &FE6B
  560 NOP
  570 LDA &FE6D
  580 LDY &FE64
  590 NOP : NOP
  600 LDX &FE6D
  610 LDY &FE64
  620 STA R%+6
  630 STX R%+7
  640 STY R%+8
  650
  660 LDA #&40
  670 STA &FE6B
  680 LDA #&00
  690 STA &FE65
  700
  710 LDA #&00
  720 LDX &00
  730 NOP : NOP : NOP
  740 STA &FE6B
  750 LDA &FE6D
  760 LDY &FE64
  770 NOP : NOP
  780 LDX &FE6D
  790 LDY &FE64
  800 STA R%+9
  810 STX R%+10
  820 STY R%+11
  830
  840 LDA #&40
  850 STA &FE6B
  860 LDA #&00
  870 STA &FE65
  880
  890 LDA #&C0
  900 NOP : NOP : NOP : NOP
  910 STA &FE6B
  920 LDA &FE6D
  930 LDY &FE64
  940 NOP : NOP
  950 LDX &FE6D
  960 LDY &FE64
  970 STA R%+12
  980 STX R%+13
  990 STY R%+14
 1000 CLI
 1010 RTS
 1020 ]
 1030 CALL MC%
 1040 PRINT "40 -> 00 IMMEDIATE"
 1050 PRINT ?(R%)
 1060 PRINT ?(R%+1)
 1070 PRINT ?(R%+2)
 1080 PRINT "40 -> 00 AT -1"
 1090 PRINT ?(R%+3)
 1100 PRINT ?(R%+4)
 1110 PRINT ?(R%+5)
 1120 PRINT "40 -> 00 AT 0"
 1130 PRINT ?(R%+6)
 1140 PRINT ?(R%+7)
 1150 PRINT ?(R%+8)
 1160 PRINT "40 -> 00 AT -1, 2 CYCLE STORE"
 1170 PRINT ?(R%+9)
 1180 PRINT ?(R%+10)
 1190 PRINT ?(R%+11)
 1200 PRINT "40 -> C0 AT -1"
 1210 PRINT ?(R%+12)
 1220 PRINT ?(R%+13)
 1230 PRINT ?(R%+14)
VIA.AC7

Code: Select all

   10 REM RESULTS FROM JAN 2019
   20 PRINT "VIA TEST: GETTING TO THE BOTTOM OF ACR WRITE AT IRQ TIME #2"
   30 DIM MC% 256
   40 DIM R% 16
   50 P% = MC%
   60 [
   70 OPT 0
   80 SEI
   90 LDA #&7F
  100 STA &FE6E
  110 LDA #6
  120 STA &FE64
  130
  140 LDA #&00
  150 STA &FE6B
  160 LDA #&00
  170 STA &FE65
  180
  190 LDA #&40
  200 STA &FE6B
  210 NOP : NOP : NOP : NOP
  220 LDA &FE6D
  230 LDY &FE64
  240 NOP : NOP
  250 LDX &FE6D
  260 LDY &FE64
  270 STA R%
  280 STX R%+1
  290 STY R%+2
  300
  310 LDA #&00
  320 STA &FE6B
  330 LDA #&00
  340 STA &FE65
  350
  360 LDA #&40
  370 NOP : NOP : NOP : NOP
  380 STA &FE6B
  390 LDA &FE6D
  400 LDY &FE64
  410 NOP : NOP
  420 LDX &FE6D
  430 LDY &FE64
  440 STA R%+3
  450 STX R%+4
  460 STY R%+5
  470
  480 LDA #&00
  490 STA &FE6B
  500 LDA #&00
  510 STA &FE65
  520
  530 LDA #&40
  540 NOP : NOP : NOP
  550 STA &FE6B
  560 NOP
  570 LDA &FE6D
  580 LDY &FE64
  590 NOP : NOP
  600 LDX &FE6D
  610 LDY &FE64
  620 STA R%+6
  630 STX R%+7
  640 STY R%+8
  650
  660 LDA #&00
  670 STA &FE6B
  680 LDA #&00
  690 STA &FE65
  700
  710 LDA #&40
  720 LDX &00
  730 NOP : NOP : NOP
  740 STA &FE6B
  750 LDA &FE6D
  760 LDY &FE64
  770 NOP : NOP
  780 LDX &FE6D
  790 LDY &FE64
  800 STA R%+9
  810 STX R%+10
  820 STY R%+11
  830
  840 LDA #&00
  850 STA &FE6B
  860 LDA #&00
  870 STA &FE65
  880
  890 LDA #&C0
  900 NOP : NOP : NOP : NOP
  910 STA &FE6B
  920 LDA &FE6D
  930 LDY &FE64
  940 NOP : NOP
  950 LDX &FE6D
  960 LDY &FE64
  970 STA R%+12
  980 STX R%+13
  990 STY R%+14
 1000 CLI
 1010 RTS
 1020 ]
 1030 CALL MC%
 1040 PRINT "00 -> 40 IMMEDIATE"
 1050 PRINT ?(R%)
 1060 PRINT ?(R%+1)
 1070 PRINT ?(R%+2)
 1080 PRINT "00 -> 40 AT -1"
 1090 PRINT ?(R%+3)
 1100 PRINT ?(R%+4)
 1110 PRINT ?(R%+5)
 1120 PRINT "00 -> 40 AT 0"
 1130 PRINT ?(R%+6)
 1140 PRINT ?(R%+7)
 1150 PRINT ?(R%+8)
 1160 PRINT "00 -> 40 AT -1, 2 CYCLE STORE"
 1170 PRINT ?(R%+9)
 1180 PRINT ?(R%+10)
 1190 PRINT ?(R%+11)
 1200 PRINT "00 -> C0 AT -1"
 1210 PRINT ?(R%+12)
 1220 PRINT ?(R%+13)
 1230 PRINT ?(R%+14)
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by BigEd » Fri Jan 04, 2019 11:40 am

Here you go:

Code: Select all

>PRINT ?&FE6A
         0
>PRINT ?&FE6A
         0

Code: Select all

>RUN
VIA TEST: GETTING TO THE BOTTOM OF ACR WRITE AT IRQ TIME #1
1F9B          
40 -> 00 IMMEDIATE
        64
         0
         1
40 -> 00 AT -1
        64
         0
         1
40 -> 00 AT 0
        64
         0
         1
40 -> 00 AT -1, 2 CYCLE STORE
        64
         0
         1
40 -> C0 AT -1
        64
        64
         1
>
>NEW

Code: Select all

>RUN
VIA TEST: GETTING TO THE BOTTOM OF ACR WRITE AT IRQ TIME #2
1F9B          
00 -> 40 IMMEDIATE
        64
        64
         1
00 -> 40 AT -1
        64
         0
         1
00 -> 40 AT 0
        64
        64
         1
00 -> 40 AT -1, 2 CYCLE STORE
        64
         0
         1
00 -> C0 AT -1
        64
         0
         1
>

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scarybeasts
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Sat Jan 05, 2019 11:47 am

BigEd wrote:
Fri Jan 04, 2019 11:40 am
Here you go:
Thanks BigEd. This confirms the quirky result with no additional quirks uncovered.

This is easy enough to emulate but it is strange to think what could be going on in the silicon to make ACR 00 -> 40 at IRQ time asymmetric with ACR 40 -> 00 at IRQ time. In both cases, ACR==00 wins; the irq flags the timer as one-shot expired.


Cheers
Chris

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BigEd
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by BigEd » Sat Jan 05, 2019 12:02 pm

I don't know anything about this, but could there be a pipeline delay? Does writing to ACR once cycle before expiry affect the IRQ in a more understandable way? Or maybe that's already been well covered?

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Richard Russell
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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by Richard Russell » Sat Jan 05, 2019 12:28 pm

scarybeasts wrote:
Sat Jan 05, 2019 11:47 am
it is strange to think what could be going on in the silicon to make ACR 00 -> 40 at IRQ time asymmetric with ACR 40 -> 00 at IRQ time.
As has been remarked before, it's only "strange" if you assume that everything is synchronous (clocked). For somebody like me who, back in the 1970s and 80s, designed mostly asynchronous logic it isn't very surprising since it's the sort of thing that can easily be explained by 'fall times' being faster than 'rise times' (particularly in the case of wired-and signals with a passive pull-up but an active pull-down).

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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Sat Jan 05, 2019 8:57 pm

Richard Russell wrote:
Sat Jan 05, 2019 12:28 pm
scarybeasts wrote:
Sat Jan 05, 2019 11:47 am
it is strange to think what could be going on in the silicon to make ACR 00 -> 40 at IRQ time asymmetric with ACR 40 -> 00 at IRQ time.
As has been remarked before, it's only "strange" if you assume that everything is synchronous (clocked). For somebody like me who, back in the 1970s and 80s, designed mostly asynchronous logic it isn't very surprising since it's the sort of thing that can easily be explained by 'fall times' being faster than 'rise times' (particularly in the case of wired-and signals with a passive pull-up but an active pull-down).
I'd love to read more about this if there are any good resources. Sounds fascinating.

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Re: 6522 VIA emulation: ACR writes vs. timer expiry

Post by scarybeasts » Sat Jan 05, 2019 8:59 pm

BigEd wrote:
Sat Jan 05, 2019 12:02 pm
I don't know anything about this, but could there be a pipeline delay? Does writing to ACR once cycle before expiry affect the IRQ in a more understandable way? Or maybe that's already been well covered?
One of the tests in the most recent dump did the same ACR writes one cycle before IRQ (the counter is 0). Writes take effect "normally" best I can see.

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