These two cases are interesting, they write to ACR to change the timer from continuous mode to one-shot mode (and visa versa) at the same time the timer is expiring. Except for jsbeeb, the write seems to take effect before the timer fire logic runs.
Tests cases are VIA.AC2 and VIA.AC3 in the SSD, or also pasted inline below. Once some kindly soul has run these, it's possible I'm getting low on test cases, at least for core functionality
Cheers
Chris
VIA.AC2
Code: Select all
10 REM RESULTS FROM DEC 2018
20 PRINT "VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #1?"
30 DIM MC% 100
40 DIM R% 16
50 P% = MC%
60 [
70 OPT 3
80 SEI
90 LDA #&7F
100 STA &FE6E
110 LDA #&00
120 STA &FE6B
130 LDA #&02
140 STA &FE64
150 LDA #&00
160 STA &FE65
170 LDA #&40
180 STA &FE6B
190 LDA &FE64
200 STA R%
210 LDA &FE6D
220 STA R%+1
230 CLI
240 RTS
250 ]
260 CALL MC%
270 REM B-EM: YES: 0, 64
280 REM B2: YES: 0, 64
290 REM BEEBEM: YES: 0, 64
300 REM JSBEEB: NO: 0, 0
310 REM MAME: NO: 253, 0
320 PRINT ?(R%)
330 PRINT ?(R%+1)
Code: Select all
10 REM RESULTS FROM DEC 2018
20 PRINT "VIA TEST: DOES ACR WRITE AT TIMER EXPIRY AFFECT BEHAVIOR #2?"
30 DIM MC% 100
40 DIM R% 16
50 P% = MC%
60 [
70 OPT 3
80 SEI
90 LDA #&7F
100 STA &FE6E
110 LDA #&40
120 STA &FE6B
130 LDA #&02
140 STA &FE64
150 LDA #&00
160 STA &FE65
170 LDA #&00
180 STA &FE6B
190 LDA &FE64
200 STA R%
210 LDA &FE6D
220 STA R%+1
230 CLI
240 RTS
250 ]
260 CALL MC%
270 REM B-EM: YES: 0, 0
280 REM B2: YES: 0, 0
290 REM BEEBEM: YES: 0, 0
300 REM JSBEEB: NO: 0, 64
310 REM MAME: YES: 255, 0
320 PRINT ?(R%)
330 PRINT ?(R%+1)
