Another small update.
I spent a good chunk of the day walking with Liz and Jack (the dog), so was only able to put a couple of hours in this afternoon.
My goal was to try to debug why *LOAD was hanging the Z80 Co Processor.
So, out with big guns:
The box at the top is a HP 54622D, which has 4M deep memory, but only very simple logic analyzer features. This is attached to the parasite side of the tube, but is limited to 13 connections because that's all that's spare on the FPGA.
The box at the bottom is my recent £9.95 eBay addition - an old HP 1650A - which only has 1K deep memory, but has excellent triggering and state filtering capabilities. This is attached to the host side of the tube.
So, what's going wrong with *LOAD?
On the host side, everything looked OK, and I could see the OSCLI command being passed across the tube, then I could see a type 1 transfer being initiated, and the bytes of the file being written to R3DATA. This it hung waiting for an acknowledgement from the parasite.
On the parasite side, I could see NMI going low, and the NMI executes the instruction at 0066, which should jump to FC61. Then things start to go wrong. NMI stays low, and pretty soon it looks like the Z80 is executing code from 0000, which isn't good.
So, there is something wrong with my NMI address mangling logic. This is meant to ensure the 0066 is fetched from ROM, but then allow the rest of the NMI to exectute from RAM.
Turns out the problem was this line:
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rom_cs_b <= '0' when cpu_mreq_n = '0' and cpu_rd_n = '0' and (bootmode = '1' or cpu_NMI_n = '0') else '1';
The mistake was to include cpu_NMI_n here - basically I had mis-read the Z80 schematic, and this extra term here means the whole of the NMI executes from ROM. This is clearly wrong, because the appropriate NMI routine for the transfer type is written to RAM (at FC61) prior to the transfer.
So, I fixed this, and *LOAD no longer crashes. But unfortunately, instead of loading the file into memory, it load's zeros.
A bit more head scratching and poking around with the logic analyzer, and I spotted a possible problem. I actually could see the right data being put on the Z80 data bus, but it looked like it was taken away slightly too soon.
Looking at the hp_reg3.v, I noticed the following line:
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assign p_data = ( p_data_available_w ) ? byte0_q_r: byte1_q_r;
Now, I know for a fact the 1 byte mode is being used, so I though I wonder what would happen if I changed it to:
Answer? *LOAD now actually loads data. Woooo!!
I don't know if this is a real bug, or is something to do with how I'm interfacing to the Z80 (yesterday I switched to CLK/RDNW style interface which is not natural for the Z80). Need to think about this some more...Or ask Ed
The next problem to look at is that *CPM is still not working. It also hangs.