System 5 Acorn 6502A Board Photos

[anightin]

Update: Latest configuration and fixes applied as of 5th May.

[Kazzie]

Thanks for the pictures.

I'd mis-understood during the Virtual Meet that this new 6502A card has 32K of SRAM on it; rather than the original 1K/2K from a 6116 as in the original. But now I see that this new card does indeed have a 6116 RAM chip on it.

Putting more than 1 or 2 kilobytes on a System CPU card is a little problematic, because of the need to keep a memory hole for I/O space from $0800 to $0FFF (and usually either $0400 to $07FF for the 40-column VDU card, or $1000 to $17FF for the 80-column), while still keeping some zero-page RAM at $0000. Acorn's approach was to use a 6116 for the zero page, with the additional ram provided by a separate chip (or chips) on another card.

I've been bouncing a few ideas on how to design a modern update of the 6502A card with a 32K SRAM chip on-board - with modern high-capacity SRAM chips, there's no real need to have a separate card to hold the memory chips. I'd prefer to only use one SRAM chip, but it'll need some imaginative address decoding to park that 32K chip between $0000 and $7FFF, while keeping the memory hole open for expansion cards. I think I've got a suitable scheme worked out. Next: installing KiCad...

[JudgeBeeb]

I'd prefer to only use one SRAM chip, but it'll need some imaginative address decoding to park that 32K chip between $0000 and $7FFF, while keeping the memory hole open for expansion cards. I think I've got a suitable scheme worked out. Next: installing KiCad...

At this level, capacity has little impact on the cost of SRAM. So, why not use something like this across the entire 64K address space and then simply use your address decoding to divert signals away from it for the relevant peripherals and ROM?

[Kazzie]

At this level, capacity has little impact on the cost of SRAM. So, why not use something like this across the entire 64K address space and then simply use your address decoding to divert signals away from it for the relevant peripherals and ROM?

A good point: I was already planning on using a larger than required ROM chip for ease of availability (a 28C256 rather than a 28C128), so there's no reason not to do the same with the RAM. Putting the RAM across the whole lower 32K, and dropping the addresses that conflict with other cards, is what I had in mind.

My planned memory map is along these lines:

Code: Select all

|---------|         ---\
|  $FFFF  |             \
|         |              \
| ROM for |
| DOS,NOS |               16KB EEPROM
| FP extn |               
|  BASIC  |              /
|         |             /
|  $C000  |         ---/
|---------|
|  $BFFF  |
|         |
|  empty  |
|         |
|  $8000  |
|---------|         ---\
|  $7FFF  |             \
|         |              \
|         |               \
|         |                \            
|   RAM   |                 \
|         |                  \
|         |
|         |
|  $2000  |
|---------|
|  $1FFF  | empty
|  $1800  |
|---------|                   32KB SRAM
|  $17FF  | 80x25 VDU         (with holes)
|  $1000  |
|---------|
|  $0FFF  | I/O
|  $0800  |
|---------| 
|  $07FF  | 40x25 VDU       /
|  $0400  |                /
|---------|               /
|  $03FF  | Base RAM     /
|  $0000  |             /
|---------|         ---/

By sacrificing the $1800-$1FFF area, and always reserving the memory space for both the 40x25 and 80x25 VDU cards, the decoding becomes fairly straightforward (if I've got things the right way around):

A15 + /( A14 + A13 + /(A12 + A11 + A10) )

• /(A12 + A11 + A10) is active high for $0000-$03FF (and also $2000-$23FF, $4000-$43FF, etc.)
• NORing this signal with A14 and A13 gives an active low signal for $0000-$03FF and $2000-$7FFF (and also $8000-$83FF, $A000-$FFFF)
• ORing with A15 restricts the active low signal to below $8000: just $0000-$03FF and $2000-$7FFF

That's three gate delays, using gates/chips that are still currently manufactured in the 74HC(T) series. And gives 24KB of contiguous RAM from $2000-$7FFF, plus the required base RAM at $0000-$3FFF. That closely mirrors the default setup of the Acorn 32K DRAM card, which provided 24KB of RAM from $2000-$7FFF, plus 8KB from $C000-DFFF (for loading BASIC and FP extension from disc into RAM).

It'd be straightforward to jumper the A10 input to +5V in order to enable RAM in the $0400-$07FF area as well if the 40x25 VDU card weren't fitted. Adding support for enabling RAM in the 80x25 VDU card's area would require changes to the logic, however: at the moment I'm not inclined to try to do so.

[roland]

At first sight your equation is right and you also have reserved space for the disc controller board at #A00 - #AFF.

Since you're using a modern RAM I'd also commit another "sin" and use a GAL for decoding the chip enable for the RAM. That way you can get the maximum out of your RAM memory by also using it above #8000 for loading basic and FP rom from disc or for additional program memory.

[Kazzie]

At first sight your equation is right and you also have reserved space for the disc controller board at #A00 - #AFF.

Since you're using a modern RAM I'd also commit another "sin" and use a GAL for decoding the chip enable for the RAM. That way you can get the maximum out of your RAM memory by also using it above #8000 for loading basic and FP rom from disc or for additional program memory.

That's a possible. I've not used GALs before (though I've got some NOS ones I got in a box of mixed bits knocking about somewhere), so it'd be something I'd have to read up on. Either way, this particular card is firmly on the back burner, as I've got other System-related projects to finish off first...

[Kazzie]

I've just noticed something while looking at the Acorn schematic for the 6502A card:

Extract from 6502A Microcomputer Circuit Diagram

The diagram implies that the 74LS244 requires two gate / chip select signals, but if a system only provides one such signal, the other can be grounded (like a 6522, for example). However, the 74LS244's datasheet has a different story:

Pinout from TI 74LS244 datasheet

Here we see that each gate signal controls four of the eight data lines. This means that on the 6502A card, according to the schematic, half of the address lines going through each 'LS244 are permanently enabled.

This would only be an issue if the Bus Request (NBRq) line were used by an external card: the 6502A card would only disable half its address lines, and not relinquish control of the address bus properly. To the best of my knowledge, no expansion cards manufactured by Acorn use the Bus Request feature, so this mis-wiring wouldn't be an issue.

The fix, if required, would be to isolate pin 19 from ground on each chip, and fit a wire to connect it to pin 1 instead.

From what I can see, this fault is present on original boards manufactured by Acorn (see Chris' Acorns and TheOddys), as well as on your reproduction, anightin.

[anightin]

From what I can see, this fault is present on original boards manufactured by Acorn (see Chris' Acorns and TheOddys), as well as on your reproduction, anightin.

Well spotted Kazzie, yes I can confirm both pin 19s from IC9 and IC10 are indeed connected to ground as per Acorn schematics.

Fortunately a very easy fix if needed.

Interesting find, I wonder what else lurks!

[ChrisO]

Good work Kazzie, I've built a couple of these boards and didn't spot that mistake ! I've added a note to the website.

Chris

[Kazzie]

I have an idea on how this 74LS244 gate mistake could have happened: Acorn had used National Semiconductor's 81LS95 octal buffer on several other cards, including the 8K RAM/ROM board and the Econet board. This chip uses both gate lines (through a NOR gate) to control all eight buffers at once:

81ls95 pinout.png (16.32 KiB) Viewed 1266 times

A familiarity with this chip may have led to the mistake with the 74LS244: the pinout is identical, but the inner configuration is slightly different. (Incidentally, the 81LS97 has separate gate lines for each side of the circuit, just like the 74LS244.)

[anightin]

From what I can see, this fault is present on original boards manufactured by Acorn (see Chris' Acorns and TheOddys), as well as on your reproduction, anightin.

Well spotted Kazzie, yes I can confirm both pin 19s from IC9 and IC10 are indeed connected to ground as per Acorn schematics.

Fortunately a very easy fix if needed.

Interesting find, I wonder what else lurks!

Found some time this weekend to get the System 5 board pictured above booting at last. The code I have on EPROM seems to initialise the 40x25 VDU card okay.

Update... and now with the 80x25 card once I found a spare 2764 EPROM for the 80x25 DOS version

Using Win10 DOS COMP utility, it reports minimal differences between ROMs, I assume a config register change only between 1MHZ 6845 and 2MHZ 68B45:

Code: Select all

Comparing SYSNOS80.bin and SYSDOS40.bin...
Compare error at OFFSET 1060
file1 = D7
file2 = E5
Compare error at OFFSET 1068
file1 = D7
file2 = E5
Compare error at OFFSET 157D
file1 = D7
file2 = E5
Compare error at OFFSET 1589
file1 = D7
file2 = E5
Compare error at OFFSET 158E
file1 = D7
file2 = E5
Compare error at OFFSET 15A3
file1 = D7
file2 = E5
Compare error at OFFSET 15AA
file1 = D7
file2 = E5
Compare error at OFFSET 1D73
file1 = D7
file2 = E5
Compare error at OFFSET 1D79
file1 = D7
file2 = E5
Compare error at OFFSET 1D82
file1 = D7
file2 = E5
10 mismatches - ending compare

Here is the code for the ROMs used:

SystemDOSNOS.zip

(14.04 KiB) Downloaded 28 times

[dominicbeesley]

Is the card pictured at the top of this thread a modern remake or an original? I've been comparing it with the System5/6502A board at theoddys.com and it looks somewhat different.

I've just spent a while transcribing the schematics into KiCad - it would be great if there were some modern design files to compare with before I start tweaking it!

D

[anightin]

Is the card pictured at the top of this thread a modern remake or an original? I've been comparing it with the System5/6502A board at theoddys.com and it looks somewhat different.

It's a modern re-make as supplied by @trevham

[dominicbeesley]

Thanks, are these boards still available? Where can I find @trevham - doesn't seem to be a user here

D

[anightin]

Thanks, are these boards still available? Where can I find @trevham - doesn't seem to be a user here

D

My apologies @trev-ham