CMS system board PROM.

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Prime
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CMS system board PROM.

Post by Prime » Sat Jun 09, 2018 12:01 pm

Hi all,

Here's a dump of the CMS 6502 board's decoder PROM. This was dumped by making an adapter from the PROM to a 2716 and then dumping, and discarding the repeated data (as the 2716 is 2Kx8 and the PROM is 512x8).
CMS-PROM.zip
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Cheers.

Phill.

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Pernod
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Re: CMS system board PROM.

Post by Pernod » Sat Jun 09, 2018 6:22 pm

Thanks for this, not decoded one of these before so is an interesting task.

So far I've confirmed that CPU addresses 0x0000-0x7fff always select the RAM in M1 as suspected, regardless of paging register.
Region 0x8000-0xbfff is dependant on paging register, 0 selects M4, 1 selects M3, 2 selects M2, 3 selects nothing.
Region 0xc000-0xffff mostly selects the MOS in M5, but not always. In the attached circuit IC8 sometimes selects Q0 or Q2 instead of Q3, never Q1. The scan of these isn't too clear, is Q0 ¬SYS and Q2 ¬CLOCK? Don't care about Q1 CMOS as the PROM never selects it. Anyway, SYS is selected at page &FA and CLOCK at page &FE, presumably from other boards.
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6502-circuit.png
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Prime
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Re: CMS system board PROM.

Post by Prime » Sat Jun 09, 2018 8:27 pm

Just thrown the PROM code into my verilog PROM emulator and it spits out the following equations they may be of assistance....

Code: Select all

CHOS <= '1';


M1 <= A(15);


M2 <= NOT ((A(15) AND NOT A(14) AND L1 AND NOT L0));


M3 <= NOT ((A(15) AND NOT A(14) AND NOT L1 AND L0));


M4 <= NOT ((A(15) AND NOT A(14) AND NOT L1 AND NOT L0));


M5 <= ((NOT A(15))
	OR (NOT A(14))
	OR (A(10) AND NOT A(9) AND A(13) AND A(12) AND A(11))
	OR (NOT A(10) AND A(9) AND A(13) AND A(12) AND A(11)));


nBlock <= NOT ((NOT A(10) AND A(9) AND A(15) AND A(14) AND A(13) AND A(12) AND 
	A(11)));


nSYS <= NOT ((A(10) AND NOT A(9) AND A(15) AND A(14) AND A(13) AND A(12) AND 
	A(11)));

Cheers.

Phill.

Prime
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Joined: Sun May 31, 2009 11:52 pm
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Re: CMS system board PROM.

Post by Prime » Sat Jun 09, 2018 8:36 pm

Pernod wrote:
Sat Jun 09, 2018 6:22 pm
Thanks for this, not decoded one of these before so is an interesting task.

So far I've confirmed that CPU addresses 0x0000-0x7fff always select the RAM in M1 as suspected, regardless of paging register.
Region 0x8000-0xbfff is dependant on paging register, 0 selects M4, 1 selects M3, 2 selects M2, 3 selects nothing.
Region 0xc000-0xffff mostly selects the MOS in M5, but not always. In the attached circuit IC8 sometimes selects Q0 or Q2 instead of Q3, never Q1. The scan of these isn't too clear, is Q0 ¬SYS and Q2 ¬CLOCK? Don't care about Q1 CMOS as the PROM never selects it. Anyway, SYS is selected at page &FA and CLOCK at page &FE, presumably from other boards.
If you take a look at the single page scans there's a clearer blowup of the decoder anyway :

Q0 = nSYS
Q1 = CHOS
Q2 = nBlock
Q3 = M5
Q4 = M4
Q5 = M3
Q6 = M2
Q7 = M1

Inputs are :
A0..6 on the PROM : A9..15 of the 6502.
A7 = Latch bit 0
A8 = Latch bit 1

Interestingly on the schematic it seems that bits 2 and 3 of the latch are connected to pins A16 and A17 on the backplane, presumably this can be used on other boards in the system to access other blocks of memory.

Cheers.

Phill.

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