Solidisk RTC

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Pernod
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Solidisk RTC

Post by Pernod » Thu Jan 03, 2019 10:27 pm

The Solidisk RTC consists of a board consisting of the Clock and Desk ROM along with a MC146818 RTC, and other logic. Pictures at http://chrisacorns.computinghistory.org ... k_RTC.html

This all plugs into a normal ROM socket, with no flying leads apart from the battery cable. How could it ever write to the RTC to set the clock? I imagine the RTC is mapped to overlay the ROM region somewhere. Anyone know of have any ideas how this was implemented?
- Nigel

BBC Model B: ATPL Sidewise, Acorn Speech, 2xWatford Floppy Drives, AMX Mouse, Viglen case, BeebZIF, etc.

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robcfg
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Re: Solidisk RTC

Post by robcfg » Thu Jan 03, 2019 11:04 pm

Hi Nigel,

I think that as most of the rom would be empty, some of the address lines of the socket are connected to the RTC instead of the rom.

I can see that 3 or 4 pads of the socket don’t have solder on them.

Disassembling the RTC rom should show writes into the rom area.

That’s my two cents :mrgreen:

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Pernod
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Re: Solidisk RTC

Post by Pernod » Fri Jan 04, 2019 12:12 am

robcfg wrote:
Thu Jan 03, 2019 11:04 pm
Disassembling the RTC rom should show writes into the rom area.

That’s my two cents :mrgreen:
That's what I would expect, but how when the ROM socket is read-only and there is no flying lead to pick up the write line.
- Nigel

BBC Model B: ATPL Sidewise, Acorn Speech, 2xWatford Floppy Drives, AMX Mouse, Viglen case, BeebZIF, etc.

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sweh
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Re: Solidisk RTC

Post by sweh » Fri Jan 04, 2019 12:37 am

Pernod wrote:
Fri Jan 04, 2019 12:12 am
robcfg wrote:
Thu Jan 03, 2019 11:04 pm
Disassembling the RTC rom should show writes into the rom area.

That’s my two cents :mrgreen:
That's what I would expect, but how when the ROM socket is read-only and there is no flying lead to pick up the write line.
Random guess: you could have the address space determine read or write e.g. if (for example) B000->BFFF was mapped to the RTC then B000->B7FF could be read and B800->BFFF be write. Then write enable would be a simple AND of the relevant address lines.
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Stephen

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ctr
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Re: Solidisk RTC

Post by ctr » Fri Jan 04, 2019 12:51 am

Another random guess using only reads: a read of &BExx latches xx, then a read of &BFyy writes yy to cmos address xx. Stephen's method does look simpler though.

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Re: Solidisk RTC

Post by Pernod » Fri Jan 04, 2019 11:45 am

sweh wrote:
Fri Jan 04, 2019 12:37 am
Random guess: you could have the address space determine read or write e.g. if (for example) B000->BFFF was mapped to the RTC then B000->B7FF could be read and B800->BFFF be write. Then write enable would be a simple AND of the relevant address lines.
ctr wrote:
Fri Jan 04, 2019 12:51 am
Another random guess using only reads: a read of &BExx latches xx, then a read of &BFyy writes yy to cmos address xx. Stephen's method does look simpler though.
Thanks for those, I wouldn't have guessed they were viable methods.

It turns out it uses reads only, in the region &BE00-&BFFF. The MC146818 has two R/W ports address and data. The address is written by reading ROM region &BE40-&BE7F, the byte read from this region (00-3F) is written to the RTC. Similarly writing data is performed by reading ROM region &BF00-&BFFF, and byte read (00-FF) is written to RTC. The address read is mapped to &BE80-&BEFF, only &BE80 is typically used. And data read is &BE00-&BE3F.

It's actually not a bad bit of hardware:
0087.png
0089.png
The *DESK option is not available unless AMX Super ROM is installed.

Next puzzle is the alarm which would cause the RTC to generate an IRQ, clearly the RTC IRQ line doesn't go to the CPU. Any ideas?

Edit: Doesn't use IRQ line, it sets up the UserVIA timer to probe the time periodically until alarm time.

In 1988 there was an updated RTC ROM called Tic-Toc from Computer and Technical Services, also seems to be fully working.
0090.png
Last edited by Pernod on Fri Jan 04, 2019 2:28 pm, edited 3 times in total.
- Nigel

BBC Model B: ATPL Sidewise, Acorn Speech, 2xWatford Floppy Drives, AMX Mouse, Viglen case, BeebZIF, etc.

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