New hardware suggestion - Pi econet server

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IanS
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Re: New hardware suggestion - Pi econet server

Post by IanS » Wed Sep 19, 2018 5:37 pm

johnkenyon wrote:
Wed Sep 19, 2018 2:37 pm
The collision detect circuit uses half a LM319 - you need the other half to handle the incoming clock and received data, so there's no additional silicon required there. If you don't have explicit detection of a collision, then you have to detect collisions by implication - e.g. timeout waiting for an acknowledgement, and even then you don't know if the timeout occurred because of a collision or the far end being to busy.

The "clock present" detection is a definite candidate for deletion - I can't see much difficulty using software to emulate this function.
There are two LM319's on a normal Econet module, two comparators in each. One chip is used for Clock and Data recovery. The other is used for collision detection.

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flynnjs
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Re: New hardware suggestion - Pi econet server

Post by flynnjs » Wed Sep 19, 2018 6:13 pm

USB Econet uses 2x SIP491 (1 for clock, 1 for data) and 1x LM339 (collision detect)

gazzaD
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Re: New hardware suggestion - Pi econet server

Post by gazzaD » Mon Sep 24, 2018 10:28 am

It's been partially done using an Arduino DUE board

https://github.com/stardot/ArduinoFilestore

The DUE is no longer available from the official store, but the versions available from the Chinese vendors on eBay seem to work just as well.
Gareth

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myelin
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Re: New hardware suggestion - Pi econet server

Post by myelin » Mon Sep 24, 2018 8:24 pm

flynnjs wrote:
Mon Sep 17, 2018 6:54 pm
The USB Econet dongle works. But there's been lack of enthusiasm to finish
the host software. We have something mostly working on Linux+Windows
but none of those involved would attempt anything on riscos.

I could make dongles available to anyone willing to commit to doing
something on the host software side.
Would it be possible to open source the host software (or all the software)? That would make it much easier to contribute to. (My selfish motive here is that I designed my own USB Econet interface hardware and never wrote any software for it, and I'd love to be able to work together on that.)
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myelin
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Re: New hardware suggestion - Pi econet server

Post by myelin » Thu Oct 04, 2018 5:02 pm

This conversation gave me a bit of energy to pick up my own USB Econet project and get it a bit closer to working. It's still far far behind flynnjs's original one and gazzaD's Arduino Filestore, but the raw output side of it seems to be going now -- the microcontroller sends bytes to the CPLD, which handles zero stuffing and getting everything out onto the Econet line in sync with the clock etc.

If I were designing something to go on a Pi, I'd probably use a small 3.3V FPGA (Lattice MachXO2 probably) rather than the CPLD on this board; as that would give a bit more room for the Econet side of things, plus a small buffer, so the Pi wouldn't need to keep feeding in bytes every 40us like on the current board.

One thing I keep wondering about is whether it's possible to just bit bang the whole thing on a microcontroller; 200kHz isn't that fast. I figure it's pretty important to set up the data output as soon as possible after the falling clock edge, though, to handle longer cables. Maybe it might be possible to hack something up with SPI, switching between 8 and 9 (maybe 10?) bit mode depending on the zero stuffing state.

I really like the TinyFPGA suggestion earlier in the thread; on that chip there's room to implement the whole system including Filestore.
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flynnjs
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Re: New hardware suggestion - Pi econet server

Post by flynnjs » Fri Oct 05, 2018 6:56 pm

myelin wrote:
Thu Oct 04, 2018 5:02 pm
Maybe it might be possible to hack something up with SPI, switching between 8 and 9 (maybe 10?) bit mode depending on the zero stuffing state.
The CPLD on my board does convert between SPI and econet by bitstuffing and unstuffing.
On RX, it obtains byte sync by usng on the opening flags and the econet clock gets
passed through to the SPI slave (USB microcontroller). The start/stop flags are used to
create a /SS line. Very large econet frames get sent in multiple USB frames. Userland
detect end of econet frame by getting a USB fragment of less than the max fragment size
(and a 0 byte frame if a precise multiple)
On TX, the microcontroller asserts a transmit request line to the CPLD and the
CPLD transmits the start flag and asserts the /SS line obtain data from the micro.

All this works, hardware, CPLD firmware, USB microcontroller software.
I have portable user mode library which uses libusb to send and receive
econet frames, tested working.
Every time I ask for some help finishing a bit of code to port between raw
econet frames and AUN there's a stoney silence.

This might be a winter project but I have others on the go too :roll:
Last edited by flynnjs on Fri Oct 05, 2018 6:59 pm, edited 1 time in total.

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danielj
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Re: New hardware suggestion - Pi econet server

Post by danielj » Fri Oct 05, 2018 7:06 pm

I'd love to help, but it's beyond my skillset I think :( Is the code on github?

d.

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myelin
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Re: New hardware suggestion - Pi econet server

Post by myelin » Fri Oct 05, 2018 7:22 pm

flynnjs wrote:
Fri Oct 05, 2018 6:56 pm
The CPLD on my board does convert between SPI and econet by bitstuffing and unstuffing.
On RX, it obtains byte sync by usng on the opening flags and the econet clock gets
passed through to the SPI slave (USB microcontroller). The start/stop flags are used to
create a /SS line. Very large econet frames get sent in multiple USB frames. Userland
detect end of econet frame by getting a USB fragment of less than the max fragment size
(and a 0 byte frame if a precise multiple)
That's really clever; this way you can avoid having to buffer too much on the CPLD side. Do you pause the SPI clock to get the microcontroller to skip the stuffed zero bits?

I had to jump through hoops to share a buffer between the transmit and receive sides (i.e. there's a 9-bit buffer for the serial comms to the microcontroller, and an 8-bit buffer for the Econet side). A GPIO line from the microcontroller selects the line direction, which works out OK because Econet is half duplex anyway. The whole thing runs off the 24MHz serial clock.
flynnjs wrote:
Fri Oct 05, 2018 6:56 pm
On TX, the microcontroller asserts a transmit request line to the CPLD and the
CPLD transmits the start flag and asserts the /SS line obtain data from the micro.
Very nice. As with reception, I guess you could just pause the SPI clock for one cycle when transmitting a stuffed zero bit.

Now I want to redo my own design to work like this; it's much smarter :)
flynnjs wrote:
Fri Oct 05, 2018 6:56 pm
All this works, hardware, CPLD firmware, USB microcontroller software.
I have portable user mode library which uses libusb to send and receive
econet frames, tested working.
Every time I ask for some help finishing a bit of code to port between raw
econet frames and AUN there's a stoney silence.

This might be a winter project but I have others on the go too :roll:
I think the circle of people interested in the details of how Econet works is pretty small, especially folks who understand AUN too. I'd be happy to help, but because of my employment contract, I can only contribute if it's open source (Apache, MIT, BSD, GPL and a few other licenses).

I started looking at the Econet-to-AUN thing a while back (as part of my unfinished attempt to add Econet support to Arculator). How are we supposed to handle scout frames? Econet's four-way handshake verifies that there's an active receiver there before sending the actual packet, and failure to respond to the scout frame is a different error to failing to ack the data frame. Is it safe to just auto-ack every scout frame and then abort the data frame if no ack comes back over UDP from the destination machine?
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Most popular: fast serial port, FX2+PiTubeDirect Tube/Cartridge adapter, USB cart interface.

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sydney
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Re: New hardware suggestion - Pi econet server

Post by sydney » Fri Oct 05, 2018 8:31 pm

danielj wrote:
Fri Oct 05, 2018 7:06 pm
I'd love to help, but it's beyond my skillset I think :( Is the code on github?

d.
Ditto. Every time Jason posts about it i think I should have a go but I wouldn't even know where to start

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Re: New hardware suggestion - Pi econet server

Post by JonC » Sat Oct 06, 2018 11:38 am

If it's a question of funds, I'm more than happy to contribute to something like this which helps everyone. But if it's skills as others have said, I'm out of my depth there.
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Lardo Boffin
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Re: New hardware suggestion - Pi econet server

Post by Lardo Boffin » Sat Oct 06, 2018 11:52 am

JonC wrote:
Sat Oct 06, 2018 11:38 am
If it's a question of funds, I'm more than happy to contribute to something like this which helps everyone. But if it's skills as others have said, I'm out of my depth there.
Same here! Money is about the only thing I can offer on this one.
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Re: New hardware suggestion - Pi econet server

Post by matt_nottm » Sat Oct 06, 2018 1:40 pm

Ditto, I would be happy to contribute cash.

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flynnjs
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Re: New hardware suggestion - Pi econet server

Post by flynnjs » Sat Oct 06, 2018 6:21 pm

myelin wrote:
Fri Oct 05, 2018 7:22 pm
That's really clever; this way you can avoid having to buffer too much on the CPLD side. Do you pause the SPI clock to get the microcontroller to skip the stuffed zero bits?
Yes, the CPLD keeps track of where the stuffed bits need to be added/dropped and
then the micro isn't clocked during the extra data bit so it is lost. On the transmit
side the CPLD, being master, pauses the SPI clock while it sends an extra bit.
To get this all to work, some logic is on the rising econet clock and some is on
the falling. Unfortunately the XC9500 CPLDs don't have dual edge FF so there is
one bit of code which has to gate the econet clock with some combinatorial,
which on proper high speed synchronous designs is a big no-no..
but it's a cheap hack that works OK here :mrgreen:

I decided that a microcontroller doing USB and HDLC stuff/unstuff and bit bang
could be tricky so offloaded the serial stuff. The good news is that the CPLD bit
could just be connected to the SPI port on a Pi if one didn't want to use it via USB.

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myelin
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Re: New hardware suggestion - Pi econet server

Post by myelin » Tue Oct 09, 2018 10:18 pm

flynnjs wrote:
Sat Oct 06, 2018 6:21 pm
Yes, the CPLD keeps track of where the stuffed bits need to be added/dropped and
then the micro isn't clocked during the extra data bit so it is lost. On the transmit
side the CPLD, being master, pauses the SPI clock while it sends an extra bit.
To get this all to work, some logic is on the rising econet clock and some is on
the falling. Unfortunately the XC9500 CPLDs don't have dual edge FF so there is
one bit of code which has to gate the econet clock with some combinatorial,
which on proper high speed synchronous designs is a big no-no..
but it's a cheap hack that works OK here :mrgreen:
I got around this by passing a 12MHz clock from the microcontroller to the CPLD, so it has a nice quick clock to use for synchronizing everything :) Of course then I ended up having to trigger something on the falling edge of that clock... can't win here!
flynnjs wrote:
Sat Oct 06, 2018 6:21 pm
I decided that a microcontroller doing USB and HDLC stuff/unstuff and bit bang
could be tricky so offloaded the serial stuff. The good news is that the CPLD bit
could just be connected to the SPI port on a Pi if one didn't want to use it via USB.
That might end up working really nicely... I think on the Pi you can just start an SPI transaction and give it a buffer, rather than having to keep feeding in bytes or clearing them out of the 1-byte buffer like on a microcontroller.

I got my board reading a broadcast packet from an A3000 today and passing it over the serial port to the microcontroller. That big endian CRC situation (mentioned by firthmj a while back) is definitely pretty odd! I was wondering where the F0B8 number (in the MC6854 datasheet) came from -- it's 1D0F (the standard CRC-CCITT residue when you preset with FFFF) reversed.
SW/EE from New Zealand, now in Mountain View, CA, making BBC/Electron hardware projects for fun.
Most popular: fast serial port, FX2+PiTubeDirect Tube/Cartridge adapter, USB cart interface.

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