Beeb FPGA

[adrm]

I do notice that MODE 7 text is no better than on the DE2.
I thought the DE1's "simpler" circuitry would give a better result, but maybe I misunderstood?

Ok, here's Hoglet's statement on this:

One more thing... Mode 7 when using sRGB mode to a SCART TV looks perfect, and is indistinguishable from a real Beeb:

This was possibly explained in the past (if so, sorry), but how do I get sRGB mode on the DE1?

[hoglet]

This was possibly explained in the past (if so, sorry), but how do I get sRGB mode on the DE1?

Switch 7 and 8 in the down position.

Then you need a VGA to SCART cable, and Hsync on VGA connected to Composite Sync on SCART.

(Very few VGA monitors will work at 15.625KHz line frequency).

[crj]

More likely the USB keyboard doesn't support PS/2 mode, or the PS/2 adapter is a mouse adapter, not a keyboard adapter.

Mmm. There's no reason to believe a keyboard with a USB A plug can also do PS/2 unless it came with an adapter.

If you do use some random adapter you have lying around, make sure it's purple and/or with a keyboard symbol moulded into it, rather than green and/or with a mouse symbol.

The only general purpose adapter I know of that allows you to plug USB keyboards and mice into PS/2 computers is the Adder KMU2P. It's the best part of a hundred quid.

[adrm]

I'm sure what you guys say is true in general.
However, it seems I've been lucky.

The following items work fine with both my DE1 and the DE2:

• Cheapo Advent USB keyboard
• Random green, i.e. for mouse, USB to PS/2 adapter

Will these play nice forever?
Only time will tell. Thing is; it's getting harder to find PS/2 keyboards these days. Next to impossible to pick up in local shops here, afaik.

[adrm]

This was possibly explained in the past (if so, sorry), but how do I get sRGB mode on the DE1?

Switch 7 and 8 in the down position.

Then you need a VGA to SCART cable, and Hsync on VGA connected to Composite Sync on SCART.

(Very few VGA monitors will work at 15.625KHz line frequency).

Thanks.

Given the lack of SCART inputs in my current screens, and reluctance to add yet another unit just for this purpose, I think I'll pass on the idea after all.

I guess I could try getting the VGA->SCART cable and try running it through my excellent SCART->HDMI converter box, but I'm guessing this will be a bit of a hit or miss prospect.

[fordp]

My TV works at both TV and VGA rates through the VGA input. I then use the Scart input for my real Beebs.

[Coeus]

The above disk image has an edited RUNNER script with the lines that load the M2 and M4 modules removed. These modules hang if the Music 2000 and Music 4000 hardware is not present. This happens on real hardware as well, see this and this.

So this would be the version I got from you in connection with M5000 in B-Em. Interestingly, when I went to implement M4000 emulation in B-Em it was the presence or absence of the actually keyboard that was causing the issue but that the emulated VIA didn't emulate the shift register.

Interestingly, the M500 version, AMPLE BCE, seems to probe for the keyboard anyway rather than having a loadable module which explains why I sometimes got get bad card errors with MMFS after using it.

[Higgy]

Hi hoglet - I've not been around for quite some time (you last helped on the Castle Quest fix).

I finally got around to looking at updating the main MMB with the fixed Uridium, and I was adding 'White Light' (although I need to contact Retro Software to check it is ok).
On my White Light test with ZX Uno (BBC v1.3 Core) I noticed that if you die the screen just goes back and hangs. You don't get a 'Game Over' or High Score.
On the MiST you get the Game Over, but the scrolling is very jerky and there are screen glitches on title etc screens.

How does it run on your FPGA setup?

Thanks

[hoglet]

How does it run on your FPGA setup?

It runs very smoothly, but I get the hang/black screen as well at the end.

I've also just tried on my real Beeb, and that also gets the hang/black screen.

I think it's likely the problem is a memory conflict of some sort between White Light and MMFS.

I'll see if I can find out what this is.

[slingshot]

Hi!

I'm new to this forum, and just want to ask about SDRAM support in BeebFpga. I want to port it to the MiST board, which already has a port of an older version by Mike Stirling. The MiST doesn't have enough BRAM or any SRAM, but has a big SDRAM, so it would be perfect for the core. However during the port, I discovered that the signals for the external mermory are not really SDRAM friendly.
So the questions are:
- are they really need to be delayed one cycle (not a big problem, just I feel it's not necessary)?
- would there any problem with the video if only crtc enable cycles are used for RAM reading? Reading in every other cycle is not really possible with the SDRAM.

[hoglet]

I'm new to this forum, and just want to ask about SDRAM support in BeebFpga.

One additional feature, the 4MHz 6502 Co Processor, relies on being able to squeeze in additional accesses to the external RAM. I just don't think this is going to be possible with SDRAM.

There are some notes about this in the code:
https://github.com/hoglet67/BeebFpga/bl ... .vhd#L1078

Now, the current layout is far from optimal, for example I don't think every other cycle needs to be a video cycle. But still, I think it will be hard to get this working with SDRAM without loosing the Co Processor.

Dave

[slingshot]

Now, the current layout is far from optimal, for example I don't think every other cycle needs to be a video cycle. But still, I think it will be hard to get this working with SDRAM without loosing the Co Processor.

Dave

Thanks for the answer, I saw the co-processor, just I didn't consider this as a must-have. Working B and Master are my first goals.

[fordp]

I'm new to this forum, and just want to ask about SDRAM support in BeebFpga.

One additional feature, the 4MHz 6502 Co Processor, relies on being able to squeeze in additional accesses to the external RAM. I just don't think this is going to be possible with SDRAM.

There are some notes about this in the code:
https://github.com/hoglet67/BeebFpga/bl ... .vhd#L1078

Now, the current layout is far from optimal, for example I don't think every other cycle needs to be a video cycle. But still, I think it will be hard to get this working with SDRAM without loosing the Co Processor.

Dave

The CoPro RAM could be in the SDRAM while the beebs 32K was placed in BlockRAM ?

[dominicbeesley]

What speed is the SRAM running at. I'd have to have a proper dig through my archive but my implementation of a BBC on an FPGA used SDRAM on the DE0 nano. I think I had it running at 8MHz, I can't remember what speed though.

It was certainly servicing the memory requests at 4MHz (the speed the beeb's real RAM runs at for interleaving with the display) to get the processor to run at 4MHz you might be able to do something funky and have the SDRAM run only at 6MHz?

...Quickly looking at the (horrible my first VHDL) code it looks like it was running at 8MHz but with 1/2 the cycles taken up for refreshes you might be able to do away with two of the refreshes? Or you can arrange for the screen accesses to do the refreshing?

D

[Nico24]

Hi - I have just loaded the BBC core onto the MIST fpga board. I don't seem to get the cool rounded BBC font. Does anyone know how I might be able to rectify this?

Thanks in advance!

[hoglet]

Hi - I have just loaded the BBC core onto the MIST fpga board. I don't seem to get the cool rounded BBC font. Does anyone know how I might be able to rectify this?

There are several different BBC Cores in existence. They all build on Mike Stirling's original work, but have gone in different directions, have different features, and run on different hardware.

The "BeebFPGA" core (that this thread is about) is the one that I maintain, and it's here I implemented character rounding (in 2015) and VideoNuLA (2018).

These features don't exist in the MIST BBC Core (written by Stephen Leary).

If you are an FPGA developer then porting might be possible, but it's quite a lot of work, as MIST has different memory timings constraints (being DRAM based).

So sorry, but there's not an easy fix.

Dave

[hoglet]

Picking up on a post from a long time ago...

That's fine Dave. I have wanted to play with a Zync based board for a while. I have not got one yet but the above just seemed the best out there right now. I would not get one without someone like you to help as the HDL would be much too hard for me right now. I had a tinker with Beeb FPGA on my DE1 and made some progress in adding a couple of simple features. I should get back to that really. Maybe I should do an add on PCB for the DE1 first. I still would like to tinker with some of the missing bits like Econet and real floppy. I need to find some time to play.

I'm currently looking for a Zynq 7020 or Artix 35T/50T/100T based board for a project I'm working on that won't fit in a Spartan 6 LX9.

Did you ever get a Zynq board?

[fordp]

I have not got round to doing much recently, I have been keeping an eye on the excellent work of others however. It is funny this should come up as I just watched this https://youtu.be/e5yPbzD-W-I today.

[Elminster]

I was looking at the icebreaker (5k) or the Arduino Vidor (16k) to start my fpga journey. But looking at the spec for a 7020 it has 7 or more times the logic, so I guess you are doing some monster project.

[TheCorfiot]

Hi Everyone

Just Got my ole DE1 out of storage and aching to loadup the BeebFPGA package with M5000 support.

It's been so long though and I cant find my original downloads.

Can someone please upload or link the latest release for the FPGA and ROM files

a Gentle poke as to how to loadup the ROM files would be awesome too.

Thanks

[hoglet]

Just Got my ole DE1 out of storage and aching to loadup the BeebFPGA package with M5000 support.

It's been so long though and I cant find my original downloads.

Can someone please upload or link the latest release for the FPGA and ROM files

a Gentle poke as to how to loadup the ROM files would be awesome too.

There are some notes in this post:
viewtopic.php?f=3&t=10295&p=182384#p182384

And the switch settings are here:
https://github.com/hoglet67/BeebFpga/wiki

If you have run this previously, you probably already have the ROMs programmed into FLASH, so could try skipping that step.

I can't rebuild at the moment, as I'm struggling to re-install Quartus 13.01 on my new Ubuntu 18.04 system, due to certain shared libraries (libpng12.so.0) not being available.

Dave

[TheCorfiot]

Cheers Dave

I'm rebuilding the project now, 363 warnings but no errors lol.
Have to work out how to add the VideoNULA bit you branched

Thanks

[hoglet]

I'm rebuilding the project now, 363 warnings but no errors lol.

I have Quartus running again now, and that's the same number as I'm seeing.

Have to work out how to add the VideoNULA bit you branched

You just need to change to the videonula branch:

Code: Select all

git checkout videonula

And then rebuild in Quartus from there.

The default build options on that branch are:

Code: Select all

        IncludeAMXMouse    : boolean := false;
        IncludeSID         : boolean := false;
        IncludeMusic5000   : boolean := true;
        IncludeICEDebugger : boolean := false;
        IncludeCoPro6502   : boolean := true;  -- The three co pro options
        IncludeCoProSPI    : boolean := false; -- are currently mutually exclusive
        IncludeCoProExt    : boolean := false; -- (i.e. select just one)
        IncludeVideoNuLA   : boolean := true ;
        UseOrigKeyboard    : boolean := false;
        UseT65Core         : boolean := false;
        UseAlanDCore       : boolean := true

So you get a 6502 Co Pro, a Music 5000 and a VideoNuLA included.

Dave

[TheCorfiot]

Thank you oh Genius

[hoglet]

I probably should just merge the videonuma branch back into master.

And refresh the ROM images with the latest versions of MMFS.

I'll add that on the list of things to do at ABUG this weekend....

Dave

[hoglet]

I'll add that on the list of things to do at ABUG this weekend....

Or maybe even sooner....

I've merged everything back to master, updated MMFS to the latest version (1.44) and created an official binary release package:
https://github.com/hoglet67/BeebFpga/re ... 91119_1211

This is built with the following options enabled:
- 65C02 Main Processor (so both Beeb and Master modes work)
- 65C02 Co Processor
- Music 5000
- SID
- Video NuLA

Enjoy!

Dave

[slingshot]

In the past weeks, I've ported some components from Beeb FPGA to MiST, but not just used your code, but added some features also: WD1770 FDC for Master, and a fixed PSG, which works perfectly with the STNICC demo. Also a VIA implementation, which works equally well in a C=1541 drive, and several other places (passes VICE tests). Feel free to use them: https://github.com/mist-devel/beeb/tree/master/rtl

[hoglet]

In the past weeks, I've ported some components from Beeb FPGA to MiST, but not just used your code, but added some features also: WD1770 FDC for Master, and a fixed PSG, which works perfectly with the STNICC demo. Also a VIA implementation, which works equally well in a C=1541 drive, and several other places (passes VICE tests). Feel free to use them: https://github.com/mist-devel/beeb/tree/master/rtl

Thanks, I'll look are merging those changing back in.

I've created an issue to remind me to do this:
https://github.com/hoglet67/BeebFpga/issues/8

Dave

[Wombatter]

Glad to see MiST core updated, one of my most used devices

Do you think there will be any chance of NULA being added?

Thx.
Al.

[slingshot]

It is possible, just I have to find some motivation to do it.