I want to further develop my IntegraB board to allow the end user to add a number of PALPROM based ROM images to the board, and I'm looking for a bit of guidance.
The PALPROM concept has been tested on my development board, and is working well. However, the switching zones associated with the PALPROMs are hard coded into the CPLD, and I need to change this so that it would be selectable, depending upon the PALPROM type the end user wants to install. There was a bit of discussion about it in these threads:
The following is a more detailed functional spec to try and describe what I'm looking to implement...
I’m planning to use a 1MB RAM module that will give me 64 x 16k blocks of memory to play with. That will give me:
- 16 x SWRAM banks (16 x 16k blocks)
- 6 x 32k PALPROMs (12 x 16k blocks)
- 4 x 64k PALPROMs (16 x 16k blocks)
- 2 x 128k PALPROMs (16 x 16k blocks)
- 1 x 32k Shadow / Private RAM (2 x 16k blocks)
- 1 x 32k Hidden IntegraB OS (IBOS) Workspace (2 x 16k blocks)
To complicate matters further, there are up to 6 different implementations of the 32k PALPROMs, each with their own different switching zones. There are two different 64k PALPROM implementations and two different 128k PALPROM implementations. Again, I will need the end user to be able to select the correct implementation type.
To help with this, I have written some logic in the CPLD that allows me to store selection options for each of the 16 available banks. This is achieved by writing to ‘spare’ registers in the &FE3x range, and these being latched by the CPLD.
The intention is then to decode the (upto) 3 bit bank type registers, and pick up the correct switching zones, which would then determine at which point a specific RAM block gets mapped in.
Does this sound at all achievable using the XILINX CPLDs, or am I expecting way too much from them? I seem to run out of space quite quickly, even on the largest CPLD.
Any pointers gratefully accepted!