Shadow RAM double buffering questions

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simonm
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Shadow RAM double buffering questions

Post by simonm »

Does enabling Shadow RAM switch the entire 20K from &3000 - &8000 ?

If so, let's suppose we are using MODE5 and want to have a double buffered screen setup such that we alternate between shadow & system ram each frame, I'm guessing any code or data that is loaded upto &5800 has to be cloned into the shadow RAM also so that it is accessible/executable regardless of which RAM is currently selected.

Further, I'm presuming you cant really put self-modifying code anywhere between &3000 and &5800 because the switching will mean the code state isn't identical between frames?

Lastly, whats the best way to switch banks in assembler? - I tried flipping &FE34 between 0 and 128 but this didn't seem to work and I cant seem to find much documentation on how it works!

Thanks!
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sweh
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Re: Shadow RAM double buffering questions

Post by sweh »

What platform are you working on? B+ ? Master? Solidisk? Other?
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hoglet
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Re: Shadow RAM double buffering questions

Post by hoglet »

Hi Simon,

There was a bit of discussion on this topic here:
http://www.stardot.org.uk/forums/viewto ... 42#p131542

And more info here:
http://www.microcomputer.org.uk/documen ... f#page=229
(specifically page F.2-3)

And in case it's useful, here is how that is implemented in BeebFPGA:
https://github.com/hoglet67/BeebFpga/bl ... .vhd#L1436

Dave
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kieranhj
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Re: Shadow RAM double buffering questions

Post by kieranhj »

Sent you a PM but thought info useful for thread.

From my experiments double-buffering in MODE 7 on a Master, yes it does switch out the entire 20k bank. Use the following code:

Code: Select all

LDA &FE34:AND #&4:STA &FE34		; normal RAM main memory
LDA &FE34:ORA #&4:STA &FE34		; shadow RAM main memory
This just changes what is mapped to main memory so can be accessed at usual address range. It doesn't change what is sent to the video hardware. My buffer swap code in Irq vsync handler looks like this but with better tabs:

Code: Select all

LDA &FE34					; set bit X = 1 -> shadow RAM mapped
AND #&FA                   ; set bit X = 0 -> normal RAM mapped
ORA double_buffer        ; set bit D = 1 -> shadow RAM displayed
STA &FE34						; set bit D = 0 -> normal RAM displayed
	
\\ Flip buffers
LDA double_buffer
EOR #&5
STA double_buffer
There is a typo in the Memory section of the AUG that has opposing descriptions of how to use one of the bits (can't remember which one off the top of my head) which is extra unhelpful but this works.
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simonm
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Re: Shadow RAM double buffering questions

Post by simonm »

Awesome, thanks all.
What platform are you working on? B+ ? Master? Solidisk? Other?
Master
This just changes what is mapped to main memory so can be accessed at usual address range. It doesn't change what is sent to the video hardware.
I presumed the 6845 is fetching from the same memory range, but gets different data depending on which RAM bank is currently paged in.
So when you say it doesn't change what is sent to the video hardware, is there any other fettling that needs to be done to make sure the video hardware displays the correct 'front buffer'?
(I know the OS has a lot of additional things to manage eg. VDU/MODE settings etc. for shadow screen modes, but Im not using any of those)


Ta!
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kieranhj
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Re: Shadow RAM double buffering questions

Post by kieranhj »

Bit D (&4) in AUG notion sets which bank is in main memory map.

Bit X (&1) sets which bank is read by video HW.
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flynnjs
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Re: Shadow RAM double buffering questions

Post by flynnjs »

AFAIK this doesn't apply to shadow boards fitted to a B which always display video from the mainboard DRAM.
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sweh
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Re: Shadow RAM double buffering questions

Post by sweh »

flynnjs wrote:AFAIK this doesn't apply to shadow boards fitted to a B which always display video from the mainboard DRAM.
Right. Beeb expansion boards can do their own thing and need not be consistent :-) Solidisk did a version of ACCCON (&FE34) which impacted how programs read the extra memory (0==main, 128==buffer, 130==shadow) but the video circuitry always read from the main memory.
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simonm
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Re: Shadow RAM double buffering questions

Post by simonm »

There is a typo in the Memory section of the AUG that has opposing descriptions of how to use one of the bits (can't remember which one off the top of my head) which is extra unhelpful but this works.
It's the D part of the register (bit 0)
AUG says "D=0 Use Shadow RAM for screen, D=1 Use main memory for screen"
Should be "D=0 Use main memory for screen, D=1 Use Shadow RAM for screen"
:D
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