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Is there any hope of tracing the opcode bits through the PLA so see which opcode bit combinations activate what? Even identifying just a few critical opcodes could be enough to cause a cascade of successful opcode inference. Eventually! I keep picking away at it like a scab, but there's a whole lot...

I'm not having any real difficulty vectorising from the existing photos. Between the two chips I'm managing to identify what goes where.

I thought the suggestion was four of the bits coming off the bus into the address decoder are from the case register and four from a segment address generator whatever those are. With the last two bits (page?) coming from somewhere else. Vague I know!

Checked them, and we each had two errors.
Your 35th and 70th values were the correct ones.

I've corrected the file on my previous post.

Which four values?

Yep I've looked again, you're quite right.
So both parts have reversed bit order to the large ROM

Ok, here's the small ROM or PLA or whatever we're calling it. X in the input are don't care. The first 8 inputs come off the bus, and the other two come from somewhere else. The input bits are in the reverse order to the large ROM inputs and outputs. I think the first 8 bits of the output are in the...

Diminished wrote: ↑

Tue Sep 01, 2020 6:16 pm

Yeah. I thought you originally read the tables the other way round, but maybe not.

Ah sorry. Yeah I've only posted up the "address" side with the don't care states etc, and not read out the output bits yet.

Wait, I think we're agreeing aren't we? Your first post has confused me. Sorry I'm feeling under the weather this afternoon and waiting until I can take another dose of paracetamol. 8 complicated somethings provide signals to the inputs of the wide left hand table, to generate row select lines, and ...

yes, it's the same as what the ROM (and everything else) does to drive the bus. See the schematic I posted.

The columns on the right seem to go up to outputs on the bus to me, but they're rather hard to follow.

Like the ROM the outputs pull the bus lines down to ground.

That's the next thing I was going to trace as Rich wanted the data read out from that too.

It must have been some other trace that had an error. :oops: This was embarrassing and highlighted what I knew all along but like an idiot didn't do anything about, that this is a highly complicated project and I should be using version control so that I can track what I've actually done. Better la...

Has anyone yet managed to transcribe the contents of the narrow ROM to the right of the program ROM (bottom left), which may be something to do with the multitasking madness? I'm intrigued by what it might contain. Until we know where all the output lines go and what the hardware at the other end d...

Whereabouts? Oh, how odd, I've overlaid mine over your original and can't see a difference. It must have been some other trace that had an error. :oops: I have hooked up a bit more to "long1" which I'm currently trying to work my way through. Around 2000,960 in your coordinate system hope...

Right, I've added "alpha", with a small correction where something was connected that shouldn't be again. "long1" terrifies me slightly

I've re-aligned a lot of my polysilicon using the new photos and things are looking much better now, so I must have just done a horrible job of aligning the images first time around somehow.

Got to go and smash up a rotten shed next, but I've saved those two new traces to look at later

BigEd wrote: ↑

Mon Aug 31, 2020 1:32 pm

And this is, I now believe, not a "narrow ROM" but a PLA which returns the entry points and resumption points for the various routines in the microcode ROM

Does having "don't care" bits make sense in that context?

Oh those new images are much nicer. I've aligned them to the metal layer and linked shrinkified versions into the svg again. https://temp.zxnet.co.uk/8271/

I've done a better job of aligning them this time I think. I'd better move all my vectors to line up properly now

If we cut up lots of chips to gain a full understanding of the logic, which then makes it possible implement a drop in replacement on an FPGA to solve the shortage of working 8271s it all becomes a bit of a circular process :lol: I think we're making decent progress with the die shots we have, despi...

BigEd wrote: ↑

Mon Aug 31, 2020 11:22 am

Here's a thing. The decoder for the narrower of the two ROMs at bottom left is much more close to a binary decoder in the photo in the published paper than it is in Sean's photos:

Interesting. Presumably that's synchronous data link controller chip.

Diminished wrote: ↑

Mon Aug 31, 2020 3:55 am

I wondered how many transistors there were. 22k? Ridiculous. I ain't tracing all those.

A lot of them are copy and paste though

Neat!

A couple of minor discoveries from tracing further out down the bus lines, your mystery signal that seems like something to do with !READY1 gates an input to the blue bus line, and the pink bus line goes down to the bottom left and gets involved in the SELECT1 output.

Diminished wrote: ↑

Sun Aug 30, 2020 10:41 pm

This might be everything, finally:

I could be, of course, that given the other things I have searched for these results are just weighted higher but I am now starting to wonder if, with WD first, many computer manufacturers took up the 8271. That could easily be because the BBC micro has a large collector community, while expensive ...

huh... I thought the connection I decided wasn't real was on the polysilicon... Now I'm confused lol.

Edit: ah yes, I see, what you're pointing to is indeed fine, but it's not connected to the poly trace coming down the outside of the die. There's just a gate that goes near to it.

I did, and then forgot about it this morning, thanks for reminding me :) Right, I've imported that and checked it all while re-aligning and cleaning up the path a bit. There isn't a connection to SELECT0, so I've just called it "unknown" for now, and removed the bits connected to that bon...

A separate post for a separate thought I had earlier. Do you think we should try to do some schematic capture of structures as we go. I'm figuring out what it's doing as I go along but imagine I'll forget what I worked out in a few days as my mental cache is overwritten with new findings. Not a full...

Did you spot my earlier post ? There's another SVG there for you. I did, and then forgot about it this morning, thanks for reminding me :) In terms of crowdsourcing vectorising the chip, there's one danger which I should stress right from the start, which is that the photos we have don't always per...

Very Interesting!