Superbrain #1 : The ratty one

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Sat Jul 08, 2017 3:01 pm

Fitting the new power switch...

IMG_0963.JPG
Shiny...


IMG_0964.JPG
Soldered lugs with heat shrink insulation. Mark should approve!

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Sat Jul 08, 2017 3:12 pm

1024MAK wrote:Ahh, tag-strip terminals. I had to show that I could solder wires to a tag-strip in order to make through as part of the selection of potential candidates for a job in 1987. Of the 34 that applied, I was one of three to get a job :D

Good work there Jon =D> =D> =D>

Mark


Not finished yet, unfortunately. Drive B: playing up, may be misaligned or may be the sensor bodge (my money is on alignment because it does occasionally work if I put a particular disk in there; on the other hand it won't format a disk). Serial ports need to be checked out with a scope (I tried MAIN but got nothing). I need to fit the keyboard encoder properly. Etc, really.

It's ironic - this is the rattiest one of the three and I bet it will stay in a cupboard at the CCH, because it's not got film star looks. And yet it boots, which is more than can be said of SB#2 (The Average One) and SB#3 (The Exceptionally Pretty One). We shall not discuss SBs #4, #5, #6 and #7, yet... They are still in a dusty lockup, waiting for the chance of freedom. Along with several hundred other worthies, which I will get to in due course.

:lol:

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1024MAK
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Re: Superbrain #1 : The ratty one

Postby 1024MAK » Sat Jul 08, 2017 3:53 pm

jonb wrote:Not finished yet, unfortunately. Drive B: playing up, may be misaligned or may be the sensor bodge (my money is on alignment because it does occasionally work if I put a particular disk in there; on the other hand it won't format a disk). Serial ports need to be checked out with a scope (I tried MAIN but got nothing). I need to fit the keyboard encoder properly. Etc, really.

It's ironic - this is the rattiest one of the three and I bet it will stay in a cupboard at the CCH, because it's not got film star looks. And yet it boots, which is more than can be said of SB#2 (The Average One) and SB#3 (The Exceptionally Pretty One). We shall not discuss SBs #4, #5, #6 and #7, yet... They are still in a dusty lockup, waiting for the chance of freedom. Along with several hundred other worthies, which I will get to in due course.

:lol:

Job for life then?... :lol:

If it's anything like the way things go around here, by time you finish the last one, something else will want attention.
I'm in the middle of getting my hands covered in carbon dust as I extract the worn brushes from a washing machine motor...

Mark
For a "Complete BBC Games Archive" visit www.bbcmicro.co.uk NOW!
BeebWiki‬ - for answers to many questions...

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Sun Jul 09, 2017 6:57 am

1024MAK wrote:Job for life then?... :lol:

If it's anything like the way things go around here, by time you finish the last one, something else will want attention.
I'm in the middle of getting my hands covered in carbon dust as I extract the worn brushes from a washing machine motor...

Mark


Proposed retirement hobby

Errm...

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Thu Jul 13, 2017 4:40 pm

Time for another update..

Since Drive B: seemed to be playing up badly ("drive not ready" all the time), I scavenged a B: drive from Superbrain #2 (The Middling One), fitted it to SB#1 and powered up.

Nothing.

Hit the reset keys, but still nothing. Starting to get concerned. Then the screen warms up and I can see the cursor, so CPU1 is OK. No boot, though. Swapped out the scavenged drive and restored the machine to single drive operation. Still nothing. Took the floppy out and fitted HxC emulator. Zippo. Fitted Z80-ICE to CPU2's socket. Looks like it is copying the ROM code to CPU1's memory, checking it's OK, failing, then looping back. Occasionally a reset will cause the drive to be read, but nothing comes back. Other times I will get the "Insert diskette" message. Most times just a blank screen.

DRAM is probably kaput, or CPU2's bus transducer. Will need to check the RAM with Z80-ICE in CPU1's socket.

Bad news. Bad bad bad! :evil:

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Thu Jul 13, 2017 5:00 pm

Looks like I lost bank 1:

Code: Select all

0000000000000000111111111111111122222222222222223333333333333333
0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF
RRRRRRRRRRRRRRRRR    R RRR    R RRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRR
WWWWWWWWWWWWWWWWW    W WWW    W WWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWW
00000000000000001    1 111    1 22222222222222223333333333333333
010145458989CDCD0    5 589    C 010145458989CDCD010145458989CDC


In fact, because the bottom two rows of each column doesn't match the top two rows, it means all the DRAM is probably gone.

Memory test confirms it... maybe some DRAM chips are OK but I seriously doubt it!

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leenew
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Re: Superbrain #1 : The ratty one

Postby leenew » Thu Jul 13, 2017 8:01 pm

What a nightmare!
I would not be calm at this point :twisted:

Lee.

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Thu Jul 13, 2017 8:43 pm

On the other hand... look at the pattern in bank 0, bottom two rows. It repeats. Same for Bank 2 and 3.

There may be another explanation for this. Hmmm.. :-k

Here's what the display means (from the Z80-ICE manual):

Code: Select all

MD: (Memory detect)
Reads and writes 16 bytes at start of all 64 1K pages of target memory and tries to detect read-only
memory and RAM. If data always reads the same despite writing several patterns, we assume its read-only
memory. If data always matches what we wrote, we assume it’s RAM. Data in each 1K page is compared with
data in lower 1K pages to detect stuck or unconnected upper address bits or the same memory appearing several
times in the memory space. Page number displayed is lowest 1K page in target memory that contains the same
data as this one. If no memory repeats, then each page will display its own page number. Note that if the bus
always floats to the same value, or is terminated to a logic one level when floating, the data will always read the
same, so it will be detected as read-only memory. Note: Executing this command will write to the first 16 bytes
of every page, so memory contents will be changed.

Examples:

0000000000000000111111111111111122222222222222223333333333333333
0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF
RRRRRRRR RRRRRRRR RRRRRRRR
OOOOOOOO OOOOOOOO WWWWWWWW
00000000 00000000 33333333
01234567 01234567 89ABCDEF

Above display shows 8K Read-only memory located in first eight 1K pages, and the same memory appears at
32K as well. An 8K RAM appears only in the top 8K pages.

0000000000000000111111111111111122222222222222223333333333333333
0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF
RRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRR
WWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWWOOOOOOOO
0000000000000000111111111111111122222222222222223333333333333333
0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF

Above display shows 8K Read-only memory located in top eight 1K pages. The rest of the address space is
filled with RAM that is fully decoded. (Does not repeat)

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hoglet
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Re: Superbrain #1 : The ratty one

Postby hoglet » Thu Jul 13, 2017 9:05 pm

jonb wrote:There may be another explanation for this. Hmmm.. :-k

Address line A11 stuck?

Dave

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jonb
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Re: Superbrain #1 : The ratty one

Postby jonb » Fri Jul 14, 2017 7:19 am

All address lines are pulsing at the DRAM pins.

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hoglet
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Re: Superbrain #1 : The ratty one

Postby hoglet » Fri Jul 14, 2017 8:07 am

jonb wrote:All address lines are pulsing at the DRAM pins.

It's possibly A11 before the multiplexors.

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1024MAK
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Re: Superbrain #1 : The ratty one

Postby 1024MAK » Fri Jul 14, 2017 3:53 pm

CPU address line A11 is not equal to a DRAM chip address line.
With DRAM, Half the address is supplied to the DRAM, then latched in via /RAS, the mux chip inputs then change state, causing the other half of the address to be presented to the DRAM, this is then latched in with /CAS.
So if a CPU address line is not changing state (for whatever reason), the DRAM address lines may all still be changing state as the mux chips switch between the two different sets of address lines. If the logic levels are different, the DRAM address pins will pulse between levels.

Oh, and don't forget that with older DRAM, /RAS controlled address also is used for DRAM refresh (CPU address lines A0 to A6).

Mark
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