Electron FPGA

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hoglet
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Re: Electron FPGA

Postby hoglet » Sun Aug 02, 2015 5:04 pm

Hi Guys,

I now have the multiple video output formats working:
- PAL RGB @ 50Hz non-interlaced (with a 16.00MHz pixel clock)
- 800x600 SVGA @ 50Hz (with a 33.33MHz pixel clock)
- 800x600 SVGA @ 60Hz (with a 40.00MHz pixel clock)

Interlaced should be possible, but I'll hold off until there is a clear need.

I was able to use the same block of VHDL for all three formats, so the complexity hasn't really increased by much:
https://github.com/hoglet67/ElectronFpg ... ronULA.vhd

The power-up default is set using a couple of jumpers.

Let me know if anyone wants to see some screen shots of the video quality.

As an added bonus, it's also possible to switch formats dynamically, using
- Ctrl+Caps+1 - PAL RGB @ 50Hz non-interlaced
- Ctrl+Caps+2 - 800x600 SVGA @ 50Hz
- Ctrl+Caps+3 - 800x600 SVGA @ 60Hz

Detecting the key press purely within the ULA was fun - it will currently only work if the OS is actively scanning the keyboard. The above combinations were picked as they are ignored by OS, and therefore don't generate spurious key presses.

On a different subject, I was also able to squeeze in the 16K SmartSPI ROM, in-spite of all the block RAMs being used up. The Xilinx tools end up implementing this as random logic ( :shock: ). It fits, but increases the compile time very significantly. But it's good for testing. Shame there doesn't seem to be a dedicate BEEB.MMB archive of Electron games. I was able to find a handful on the STH 143 disc collection, but surely someone has put together something more targeted?

Dave

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Re: Electron FPGA

Postby rharper » Mon Aug 03, 2015 11:02 am

Here is my Electron BEEB.MMB with some games, electron ROMs, etc.
You are welcome to use it as you wish.

Ray :)
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ELKBEEBMMB.zip
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hoglet
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Re: Electron FPGA

Postby hoglet » Mon Aug 03, 2015 11:13 am

Ray,

Many thanks for this.

Off to do some more "testing" :D

Dave

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hoglet
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Re: Electron FPGA

Postby hoglet » Mon Aug 03, 2015 12:02 pm

Hi Ray,

Nice GAMES menu on disk 100!

Pretty much everything except Elite works.

Elite starts loading, then ends up with a "Bad Program". Not sure if this is a hardware issue, or if it only works with an E00 DFS. Any thoughts?

Edit: The disk image works in Elkulator, but this has page at &E00, not at &1700.

Dave

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Re: Electron FPGA

Postby rharper » Mon Aug 03, 2015 1:44 pm

Here is an Electron DFS Elite image that might work, I can't remember the source of the one on the BEEB.MMB
I usually remove non-essential files and may have made a mistake.
Ray
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rcook
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Re: Electron FPGA

Postby rcook » Mon Aug 03, 2015 4:11 pm

rharper wrote:Here is an Electron DFS Elite image that might work, I can't remember the source of the one on the BEEB.MMB
I usually remove non-essential files and may have made a mistake.
Ray


Please forgive my ignorance: what's BEEB.MMB?
Proud parent to Acorn Electrons 06-ALA01-0003584 and 07-ALA01-0017948

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Re: Electron FPGA

Postby rharper » Mon Aug 03, 2015 4:35 pm

rcook wrote:Please forgive my ignorance: what's BEEB.MMB?

It's the file that MMC card readers look for. It contains space for 511 ssd images.
They connect to the serial port.
There are 'commercial' versions and do it yourself ones.
Ray :)
Raycomp

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hoglet
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Re: Electron FPGA

Postby hoglet » Mon Aug 03, 2015 4:47 pm

Hi Ray,

Thanks for that - I took a look and I think it's identical to the one at disk 99 in your archive. Anyway, it crashed also.

Then I realized I was using an old version of the T65 core (one I lazily just copied from AtomFPGA). So I updated to the latest and greatest from FPGA Arcade.

Somewhat amazingly, this version seems to cure all ills:
- Elite now works perfectly
- The strange problem I had with COLOUR 15 not flashing is fixed
- The rate of display interrupts is now correct (I think I must previously been experiencing the interrupt handler running twice for each interrupt).

Thanks for your help, much appreciated.

The next challenge I think is the cassette interface.

Dave

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Re: Electron FPGA

Postby duikkie » Mon Aug 03, 2015 5:09 pm

SEI
i know you can use a parallel port as serial , but the user port are most of the time not called a serial port ( like rs432).

there are also BEEBxxxx.MMB file :wink: , so a SD CARD can hold up to 511*511 ssd files :roll: , i have hear about a rom, that can access more then 1 BEEB.MMB :shock:

(not promoting anything , no commercial [-X )
CLI

rharper wrote:
rcook wrote:Please forgive my ignorance: what's BEEB.MMB?

It's the file that MMC card readers look for. It contains space for 511 ssd images.
They connect to the serial port.
There are 'commercial' versions and do it yourself ones.
Ray :)

grannyg
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Re: Electron FPGA

Postby grannyg » Fri Aug 28, 2015 9:36 am

I thought I'd have a go at getting Electron FPGA up and running. It took a while to get all the necessary tools downloaded and installed on linux.
Flashed the bit file, turned on and it worked first time. :o

I couldn't play elite as function keys don't appear to be working. :? Also everything is running in turbo mode. Apart from the odd issue accessing the BEEB.MMB file everything works great.

One feature request, adding SWRAM support.
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el_galax.jpg
el_elite.jpg
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hoglet
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Re: Electron FPGA

Postby hoglet » Fri Aug 28, 2015 2:29 pm

grannyg wrote:I thought I'd have a go at getting Electron FPGA up and running. It took a while to get all the necessary tools downloaded and installed on linux.
Flashed the bit file, turned on and it worked first time. :o

=D> =D> =D> =D>

Are you using the Papilio Duo as well?
grannyg wrote:I couldn't play elite as function keys don't appear to be working. :?

What key combinations have you tried?

I think F1 should be Caps Lock + 1, just like on the real electron.
grannyg wrote:Also everything is running in turbo mode.

F1 clocks the 6502 at 1MHz
F2 clocks the 6502 at 2MHz
F3 clocks the 6502 at 4MHz.
F4 clocks the 6502 at 8MHz.

There is no memory contention (yet) but 1 MHz should be right for most games.
grannyg wrote:Apart from the odd issue accessing the BEEB.MMB file everything works great.

Anything repeatable? I'm happy to try to reproduce and fix bugs.
grannyg wrote:One feature request, adding SWRAM support.

On this Papilio, it should be possible to do this using the external SRAM. I'll add it to the todo list.

Dave

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Re: Electron FPGA

Postby grannyg » Sat Aug 29, 2015 8:58 am

I'm also using the the Papilio Duo 2MB version.

I'd forgotten about the function key combination. :idea: Elite is now fully functional. Thanks.

I noticed pressing F4 then F10 to reset always results in 'Card?'. The other speeds work fine.

I always get a disk read error at a certain point loading the same games. Others within the same BEEB.mmb file always work. I've uploaded it so you can take a look. No 34 (Snapper) always gives the error. e.g. 'MMC Read fault 3D/00096A' after doing a '*.' once it's failed. Have to then press F10 several times to get rid of the 'Card?'.
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BEEB.zip
(1.01 MiB) Downloaded 24 times

duikkie
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Re: Electron FPGA

Postby duikkie » Sun Aug 30, 2015 9:51 am

i can't check this because i don't have a electron

maybe the speed is to fast at f4 ? , there is a time needed to responce from command beeb to answer card ?

snapper is loading and it can be played ?
a read error mostly comes after a "illegal"command to userport adress
maybe snapper is playing with via(6522) registers. ?



grannyg wrote:I'm also using the the Papilio Duo 2MB version.

I'd forgotten about the function key combination. :idea: Elite is now fully functional. Thanks.

I noticed pressing F4 then F10 to reset always results in 'Card?'. The other speeds work fine.

I always get a disk read error at a certain point loading the same games. Others within the same BEEB.mmb file always work. I've uploaded it so you can take a look. No 34 (Snapper) always gives the error. e.g. 'MMC Read fault 3D/00096A' after doing a '*.' once it's failed. Have to then press F10 several times to get rid of the 'Card?'.

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hoglet
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Re: Electron FPGA

Postby hoglet » Sun Aug 30, 2015 10:34 am

I would not expect the MMC system to work at higher clock speeds, and I don't think this is something we should spend any time on.

These setting are just for fun, i.e. for making games very difficult.

Dave

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Re: Electron FPGA

Postby rcook » Mon Aug 31, 2015 6:16 pm

hoglet wrote:The power-up default is set using a couple of jumpers.


I got myself a shiny new Papilio Duo with the classic computing shield, forked your project from GitHub, built the bitfile and programmed the device. A quick Ctrl+Caps+3 and it's successfully displaying on my 60 Hz LCD monitor:

Image

What jumper do I set on the board to bring it up in this video mode by default?

-Richard
Proud parent to Acorn Electrons 06-ALA01-0003584 and 07-ALA01-0017948

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hoglet
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Re: Electron FPGA

Postby hoglet » Mon Aug 31, 2015 6:47 pm

rcook wrote:What jumper do I set on the board to bring it up in this video mode by default?

Fn-Ctrl-3 sets the video mode to 50Hz VGA, which is great if your monitor supports it.

To get this on power up, just set jumper #2.

Dave

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Re: Electron FPGA

Postby hoglet » Thu Sep 10, 2015 5:03 pm

hoglet wrote:Now I just need to figure out why the tape loading is sometimes locking up an normal Electron speeds, but is 100% reliable at 2MHz and 4MHz.

After much debugging, it turned out I had some mistakes in my implementation of the Interrupt Enable Register, the result being that the high tone interrupt could not be disabled. After fixing this, tape loading is reliable at all speeds.

Dave

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Re: Electron FPGA

Postby davidb » Thu Sep 10, 2015 8:11 pm

It's good to know you have that working. It means you can test out some tape-only games. :D

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Re: Electron FPGA

Postby grannyg » Sat Nov 21, 2015 8:06 am

After upgrading to the latest bit file the SmartSPI rom no longer appears. The Aug 6th version is the last one that works ok.

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hoglet
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Re: Electron FPGA

Postby hoglet » Sat Nov 21, 2015 9:26 am

grannyg wrote:After upgrading to the latest bit file the SmartSPI rom no longer appears. The Aug 6th version is the last one that works ok.

Yes, I accidentally commented it out. :oops:

Lines 144-148 in ElectronFpga_core.vhd - I'll fix that this morning. You can easily fix locally if you like as well.

Dave

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Re: Electron FPGA

Postby hoglet » Sat Nov 21, 2015 10:26 am

Actually, it's a bit more complicated than that.

The clock speed keys have changed to:
- F1 = 1MHz fixed
- F2 = 2MHz with contention (the default)
- F3 = 2MHz fixed
- F4 = 4MHz fixed

It seems the MMC system doesn't quite work with the default (F2), but works at all other speeds.

I'm pretty sure it's a 6522 bug that I have just fixed in BeebFpga, so I'm going to try and apply that fix here.

Dave

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Re: Electron FPGA

Postby fordp » Sat Nov 21, 2015 12:01 pm

Hi All,
I have just ordered a Duo 2MB with computing add-on.

You can never have too many FPGA boards and if I do not get my DE1 going I will be able to play :D

2MB of RAM should give interesting options.

I wonder if the on-board micro is wired in a suitable way to reprogram the FPGA?

FordP
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Re: Electron FPGA

Postby hoglet » Sat Nov 21, 2015 12:34 pm

fordp wrote:Hi All,
I have just ordered a Duo 2MB with computing add-on.

You can never have too many FPGA boards and if I do not get my DE1 going I will be able to play :D

It's a nice board, and like the DE1 has a build-in programmer, which is rare for a Xilinx board.

Jack Gassett, who runs GadgetFactory, is amazing supportive on the forums.
fordp wrote:I wonder if the on-board micro is wired in a suitable way to reprogram the FPGA?

I haven't really used on on-board AVR processor yet.

But as it's technically possible for the FPGA to re-program itself, then I think this should be possible. We make use of this feature in the Matchbox Co Pro to allow soft switching between one Co Pro design and another, as the FLASH has space for about 13 designs. The FLASH is also writeable from the FPGA, so the ingredients are there, but it's likely to be a bit hairy to orchestrate.

Dave

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Re: Electron FPGA

Postby fordp » Sat Nov 21, 2015 12:45 pm

13 Designs should cover most bases.

I think the AVR should be used to host a Boot menu.

The HDL in the first design can allow the AVR to write to the screen and pre-load the RAM before the other Designs load.

A VT100 or VT52 terminal design in the Boot Design would be cool.

FordP
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hoglet
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Re: Electron FPGA

Postby hoglet » Sat Nov 21, 2015 1:05 pm

grannyg wrote:After upgrading to the latest bit file the SmartSPI rom no longer appears. The Aug 6th version is the last one that works ok.

OK, this is now working correctly at all clock speeds. Updates are pushed to git.

Dave

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Re: Electron FPGA

Postby grannyg » Sat Nov 21, 2015 3:29 pm

hoglet wrote:OK, this is now working correctly at all clock speeds. Updates are pushed to git.



Thanks. Everything is working ok now.

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Re: Electron FPGA

Postby hoglet » Sat Nov 21, 2015 3:43 pm

grannyg wrote:
hoglet wrote:OK, this is now working correctly at all clock speeds. Updates are pushed to git.



Thanks. Everything is working ok now.

Hopefully I can do something about that! :lol:

I've half way through a big refactor that will support Sideways ROM/RAM, and mean we don't have to chew up FPGA Block RAM implementing ROMs. It will also make the compile *much* faster, because currently one of the ROMs is getting implemented as random logic. :shock:

Dave

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Re: Electron FPGA

Postby hoglet » Sat Nov 21, 2015 5:39 pm

I've just pushed my latest code that adds sideways ROM/RAM support.

Building from source is slightly more complicated, as there are now two steps
- build the .bit file in Xilinx ISE as before
- run the make_xilinx_bitstream.sh script in from directory roms to append the rom images, and program the board

I've also checked in a .bit file (that includes the rom images).
https://github.com/hoglet67/ElectronFpg ... ga_duo.bit

I've switched over to MMFS instead for SmartSPI as it seems to not conflict with the AP2 ROM.

Dave

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Re: Electron FPGA

Postby fordp » Sat Nov 21, 2015 5:49 pm

fordp wrote:
-- Snip --

A VT100 or VT52 terminal design in the Boot Design would be cool.

FordP


What was I thinking it would have to a Viewdata/ Prestel compatible terminal for an Acorn project ;)

FordP
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Re: Electron FPGA

Postby grannyg » Sat Nov 21, 2015 6:18 pm

hoglet wrote:I've just pushed my latest code that adds sideways ROM/RAM support.


Everything still working ok. =D>


I've switched over to MMFS instead for SmartSPI as it seems to not conflict with the AP2 ROM.


Does MMFS have the ability to swap MMB files like SmartSPI? If not could it be added. [-o<


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