Electron FPGA

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hoglet
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Electron FPGA

Postby hoglet » Wed Jul 29, 2015 5:59 pm

Hi Guys,

Today I managed to get a first version of a new Electron FPGA project to boot:

Here's the evidence:
IMG_1036.JPG

IMG_1037.JPG

IMG_1038.JPG

I'm currently targeting the Papilio Duo hardware. It needs something with the Xilinx XC6SLX9 or larger, as the 32K ROM and 32K RAM are both implemented as FPGA block RAM.

I've pushed what I have so far to github:
https://github.com/hoglet67/ElectronFpga

As well as being a nice standalone project, the plan is the ULA part could eventually be reused in a real Electron as a ULA replacement/enhancement.

It's pretty rough at the moment, especially the ULA part:
https://github.com/hoglet67/ElectronFpg ... ronULA.vhd

The irony is that would have worked pretty much first time, if I hadn't inverted the keyboard data. And holding down SHIFT and CONTROL seems to stop an Electron from booting. Thanks to Jonathan's disassembly for helping me figure out where it was getting stuck.

There is lots more to do, especially on the video side. At the moment it outputs 800x600 SVGA with the 640x512 Electron screen centred within this. The only mode I have implemented so far is Mode 6. The blue lines are deliberate.

The TODO list currently looks like:
- Implement other screen modes (which may take some time.....)
- Implement the colour palette
- Implement the cassette stuff as much as possible
- Do a better job of commenting the VHDL :oops:

I do have a couple of questions...

1. As a ULA replacement/enhancement, is SVGA the desired video format, or would legacy RGB also be needed?

2. Currently the cursor is flashing too fast, I think because the Display End interrupt is happening at 60Hz. I'm assuming this interrupt drives the cursor, is that correct? On a real Electron, is this interrupt 50Hz or 25Hz?

3. Under what circumstances will the Electron ULA generate an NMI?

4. What would be the simplest "modern" storage solution to try to implement that works with micro SD cards? I could easily add a 6522 user port, so would something like TurboMMC be possible? The problem is going to be lack of space in the FPGA for another ROM, as all the LX9 block RAMs are used up now. How big is the TurboMMC ROM?

Dave

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hoglet
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Re: Electron FPGA

Postby hoglet » Wed Jul 29, 2015 7:38 pm

There's a great document written by PaulB on the Electron ULA here:
http://hgweb.boddie.org.uk/ULA/file/tip/ULA.txt

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roland
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Re: Electron FPGA

Postby roland » Wed Jul 29, 2015 7:48 pm

Dave .... this is amazing ... I am speechless of what you're doing =D> =D> =D>
256K + 6502 Inside
MAN WOMAN :shock:

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hoglet
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Re: Electron FPGA

Postby hoglet » Wed Jul 29, 2015 7:57 pm

roland wrote:Dave .... this is amazing ... I am speechless of what you're doing =D> =D> =D>

In many ways, the electron is actually simpler that the Atom. It doesn't have 6522, 8255, 6847, etc. Just a single ULA. Most of the ULA registers are write only, which also makes things easier.

I think the biggest challenge is going to be doing the 7 different screen modes in an elegant way, rather than a "cut and paste" way :lol:

Dave

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1024MAK
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Re: Electron FPGA

Postby 1024MAK » Wed Jul 29, 2015 8:45 pm

Due to a temporary brain failure, please move along and ignore my drivel...

hoglet wrote:I think the biggest challenge is going to be doing the 7 different screen modes in an elegant way, rather than a "cut and paste" way :lol:
Err, SIX screen modes... The standard Acorn Electron does not have Mode 7

Mark
Last edited by 1024MAK on Thu Jul 30, 2015 7:44 pm, edited 1 time in total.
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Re: Electron FPGA

Postby paulv » Wed Jul 29, 2015 8:47 pm

1024MAK wrote:Err, SIX screen modes... The standard Acorn Electron does not have Mode 7 [-X

Mark


But it does have Mode 0... So it has 7 modes as opposed to the Beeb with 8 modes...

Paul

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Re: Electron FPGA

Postby daveejhitchins » Wed Jul 29, 2015 8:55 pm

Way to go, Dave . . . A brilliant start =D>

Re display, if it's a 'replacement' ULA then the output would be as it is now . . . But others may have different views!

Dave H :D
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1024MAK
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Re: Electron FPGA

Postby 1024MAK » Wed Jul 29, 2015 9:45 pm

paulv wrote:
1024MAK wrote:Err, SIX screen modes... The standard Acorn Electron does not have Mode 7 [-X

Mark


But it does have Mode 0... So it has 7 modes as opposed to the Beeb with 8 modes...

Paul

At last, an opportunity to have an argument about "is zero a number"... :lol:

Mark

PS, I really should stop trying to to watch TV, bit on eBay and type replies at the same time #-o
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Re: Electron FPGA

Postby paulb » Wed Jul 29, 2015 10:31 pm

hoglet wrote:There's a great document written by PaulB on the Electron ULA here:
http://hgweb.boddie.org.uk/ULA/file/tip/ULA.txt


You're too kind! :D I guess you stopped reading just after the strictly technical observations and before I get into "stuff you could do if you are also crazy" part. :lol:

Actually, reading some of the Retro Software forums, I thought of some other ideas for a Super ULA, and then there are some other enhancements I've been pondering recently, not to mention my DMA world domination plan. :twisted:

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1024MAK
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Re: Electron FPGA

Postby 1024MAK » Wed Jul 29, 2015 11:33 pm

Mode 8 anyone?

Mark
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Re: Electron FPGA

Postby rcook » Thu Jul 30, 2015 12:22 am

This. Is. Awesome.
Proud parent to Acorn Electrons 06-ALA01-0003584 and 07-ALA01-0017948

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Re: Electron FPGA

Postby Elk Towers » Thu Jul 30, 2015 7:16 am

Dave

I don't know if this easy to implement or not, but as far as a ULA replacement.
have say CTRL R BRK for legacy rgb video through existing elk circuitry and CTRL V BRK for svga video to a db15 connector that's connected to the fpga.


Nick
Nick

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AlanD
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Re: Electron FPGA

Postby AlanD » Thu Jul 30, 2015 7:45 am

Hello Dave

the timer int happens at the end of line 100
frame end int happens at the end of line 256

on a real elk the frame rate is 50.08 Hz a good test of these is to read the time variable and see if it counting at the correct rate


the ULA never generates an NMI it is an input to the ULA it forces the ULA to give up the RAM to the 6502 for high priority devices like disc that cannot wait to be serviced hence some mode disk activity causes snow on the screen

AlanD

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Re: Electron FPGA

Postby daveejhitchins » Thu Jul 30, 2015 7:49 am

Elk Towers wrote:CTRL R BRK for legacy rgb video through existing elk circuitry and CTRL V BRK for svga video to a db15 connector that's connected to the fpga.
Unfortunately those keys are taken, see here, although V could possibly be used . . .

Dave H :D
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hoglet
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Re: Electron FPGA

Postby hoglet » Thu Jul 30, 2015 8:05 am

AlanD wrote:Hello Dave

the timer int happens at the end of line 100
frame end int happens at the end of line 256

on a real elk the frame rate is 50.08 Hz a good test of these is to read the time variable and see if it counting at the correct rate

Thanks for this info.

I need to ponder what best to do when the output is 60Hz SVGA.

I could adjust the timings to 50Hz SGVA, which my HP LP2065 monitor is happy with but it's one of the few that works at 50Hz.

What did your ElkFPGA output?

AlanD wrote:the ULA never generates an NMI it is an input to the ULA it forces the ULA to give up the RAM to the 6502 for high priority devices like disc that cannot wait to be serviced hence some mode disk activity causes snow on the screen

There is no contention for the RAM in the FPGA, as it's truly dual ported, so I think this is a "feature" I will not be implementing. I'll just ignore the NMI input for now. For a similar reason, the CPU can run at 2MHz.

This does raise an interesting issue as to whether the goal is to faithfully replicate the original system (foibles and all), or whether to make some obvious improvements as the new technology allows. Discuss. :D


Dave

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Re: Electron FPGA

Postby daveejhitchins » Thu Jul 30, 2015 8:53 am

hoglet wrote:This does raise an interesting issue as to whether the goal is to faithfully replicate the original system (foibles and all), or whether to make some obvious improvements as the new technology allows. Discuss. :D
IMO it should be switchable, like the Slogger/Prime Turbo board. It would depend how many spare pins would be available as to how many 'feature' sets could be selected. As to what features are wanted - the list here could be carried across, updated and maybe even voted on (I think 'you' would need to vet the choices to ensure they are possible/feasible!)

Dave H :D
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oss003
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Re: Electron FPGA

Postby oss003 » Thu Jul 30, 2015 9:10 am

Great job Dave =D>

With all these Acorn FPGA's I think it's time to create some nice new Acorn case for the FPGA. They now have a format that fits a 3D printer ........ :wink:

Again, great job. You keep amazing me with all the FPGA features. Keep up the good work!!

Greetings
Kees

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Re: Electron FPGA

Postby dominicbeesley » Thu Jul 30, 2015 11:10 am

Well done, it's fun isn't it.

Did you get my patch for T65 - I found that the P flags got corrupted during interrupt returns sometimes and made a patch that got a lot more software working. I suspect that most T65 users never ran into this on other less interrupt happy projects. http://dossytronics.blogspot.co.uk/2014 ... chive.html

The 50Hz thing is a real pain in the bum. It's just as bad in the HDMI world - my FPGA thing outputs normal composite and HDMI at 50Hz but there are very few monitors that will do 50Hz the limit on one of mine being 51.5Hz totally precluding PAL without having a frame buffer and a lot of extra leading to horrible temporal distortions. I bet there is no good reason for it other than the firmware developers living in an NTSC territory! I don't like having to have all my programs run at the wrong speed!

D

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Re: Electron FPGA

Postby MichaelM » Thu Jul 30, 2015 11:28 am

domimicbeesley:

Would it be possible for you to simply attach the T65 core's source files to a post in this thread? I would like to get a version of the T65 core with the latest patches.
Michael A.

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Re: Electron FPGA

Postby dominicbeesley » Thu Jul 30, 2015 12:22 pm

Hi Michael, my latest versions are on the linked blog post. I don't have any later ones here. There may be later patches on line but I couldn't find any

D

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hoglet
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Re: Electron FPGA

Postby hoglet » Thu Jul 30, 2015 12:52 pm

The T65 core is being maintained by MikeJ of fpgaarcade.com.

The latest version (Version 313, ~8 weeks ago) can be found here:
http://svn.fpgaarcade.com/viewvc/Replay ... b/cpu/t65/

The login details are here:
http://svn.fpgaarcade.com/

This does not contain Dominic's fix. I'm interested in understanding the problem this addresses. AtomFPGA uses interrupts (e.g. the 6522 time driving SID audio), and I've not experiences spurious interrupts. It would be interested to re-test the latest version to see if it still has the interrupt issue - it's possible Mike has addressed this in another way.

Dave

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Re: Electron FPGA

Postby poink » Thu Jul 30, 2015 1:55 pm

hoglet wrote:1. As a ULA replacement/enhancement, is SVGA the desired video format, or would legacy RGB also be needed?

I'd tend to suggest that legacy RGB was desirable; as it'd potentially allow a drop in replacement for dead Electrons.

Elk Towers wrote:have say CTRL R BRK for legacy rgb video through existing elk circuitry and CTRL V BRK for svga video to a db15 connector that's connected to the fpga.

Could one just detect the presence of a monitor/VGA cable at power on? Might be as simple as looking for pins getting grounded (At a guess, perhaps pin 10?).

Worst case, would be something like looking to see if pin 11 is grounded and if it's not checking for an I2C EEPROM (address 0x50) by hardcoded reads (looking for the fixed header - 00 FF FF FF FF FF FF 00 - or part thereof).

I think some way (jumper, dipswitch) of setting the default might be beneficial though.

hoglet wrote:The problem is going to be lack of space in the FPGA for another ROM, as all the LX9 block RAMs are used up now. How big is the TurboMMC ROM?

With ROMs, could you not directly pull the data from the on-board Flash? I think I've seen some parts advertise this (at least on the Xilinx side). I guess that might just be too slow though?

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Re: Electron FPGA

Postby Multiwizard » Thu Jul 30, 2015 6:48 pm

What Kees said... =D> :D =D>


Greetings, Wim... :-)

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Re: Electron FPGA

Postby eelco » Thu Jul 30, 2015 6:58 pm

Wow, great job! =D>
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Re: Electron FPGA

Postby jbnbeeb » Thu Jul 30, 2015 7:12 pm

Today I managed to get a first version of a new Electron FPGA project to boot:


I was wondering what your new project would be! Nicely done! =D> =D> =D> This on top of your 8080 machine "digital archaeology" too :)
I'll follow this with interest.

I'll update in your copro usage thread soon as I have mine back now.
I'm going to ..
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Image

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hoglet
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Re: Electron FPGA

Postby hoglet » Thu Jul 30, 2015 7:14 pm

Thanks Guys :oops:

I've implemented all the screen modes now and the colour palette:
https://github.com/hoglet67/ElectronFpg ... ronULA.vhd

It's 99% working (isn't that always the way), but for some reason in MODE 2 COLOUR 15 is not flashing.

Now, I can do the following:

Assign physical colour 15 to logical colour 1:
- VDU 19,1,15;0;
and this gives black/white flashing (correct).

Assign physical colour 1 to logical colour 15:
- VDU 19,15,1;0;
and this gives solid red (correct).

Assign physical colour 8 to logical colour 15:
- VDU 19,15,8;0;
and this gives white/black flashing (correct).

But for some reason
- VDU 19,15,15;0;
results in a solid white.... very strange....

Dave
Last edited by hoglet on Thu Jul 30, 2015 7:49 pm, edited 2 times in total.

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1024MAK
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Re: Electron FPGA

Postby 1024MAK » Thu Jul 30, 2015 7:47 pm

Well done Dave 8) =D> =D> =D>

I'm sure you will soon sort that problem out in a flash :wink: (sorry)

Mark
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Re: Electron FPGA

Postby MichaelM » Thu Jul 30, 2015 11:35 pm

dominicbeesley/hoglet:

Thanks for the links. I've merged the dominicbeesley's change into jms2's source. I will use that.

hoglet:

Look forward to more from you on this project.
Michael A.

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hoglet
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Re: Electron FPGA

Postby hoglet » Sun Aug 02, 2015 10:53 am

Hi Guys,

I've started working today on the multiple video standards.

Eventually I'm aiming to try to support:
- SGVA 800x600 @ 60Hz
- SGVA 800x600 @ 50Hz
- RGBs @60Hz
- RGBs @50Hz
and these would be jumper selectable (maybe with keyboard control later).

Now earlier in the thread AlanD said the Electron 50Hz was actually 50.08Hz (i.e. 50 * 625 / 624). I assumed this meant that the Electron video frame was 624 lines, with two identical 312 line fields, i.e. non-interlaced.

However, I just hooked my Electron up to a proper old CRT monitor (a Commodore 1084) and it's definitely producing an interlaced display, and it looks like the timing is spot on at 50Hz, with each field containing 312.5 x 64us lines.

Further investigation with a decent storage scope allows me to see the composite sync signal in gory detail):

First (Odd) Field:
IMG_1041.JPG

Second (Even) Field:
IMG_1039.JPG


So, here's my question.

In re-creating the ULA, do we actually want it to produce an interlaced video signal? On the Beeb, where *TV allows you to choose, I always preferred the non-interlaced setting, which gives a rock steady display.

Thoughts?

Dave

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Re: Electron FPGA

Postby poink » Sun Aug 02, 2015 11:31 am

hoglet wrote:In re-creating the ULA, do we actually want it to produce an interlaced video signal? On the Beeb, where *TV allows you to choose, I always preferred the non-interlaced setting, which gives a rock steady display.

I've not really got a preference, but there's a handful of effects (often palette manipulation based) that rely on the two fields being displayed at different positions.

Although, SVGA display (if you don't have the memory to hold the previous field) breaks these anyway.


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