P.R.E.S. AP5 - Original and Re-Design

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danielj
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby danielj » Sat Apr 29, 2017 11:53 pm

I think hoglet possibly has already done it...?

d.

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hoglet
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby hoglet » Sun Apr 30, 2017 6:50 am

danielj wrote:I think hoglet possibly has already done it...?

Unfortunately not.

What I did with SteveF and dp11 (ADFS 1.57) was based on the Master version of ADFS (1.53) and only worked on the Master:
https://github.com/hoglet67/ADFS

Jonathan forked this last year, and did his own take on it, optimizing larger chunks, but a bit less aggressively that Steve and Dominic did:
https://github.com/jgharston/ADFS
The SD card drivers in this don't work at the moment - Jonathan, I can let you know what's broken when you are ready. I know you are busy with other things at the moment.

It looks like he does have ambitions to generalise this:
https://github.com/jgharston/ADFS/blob/ ... fs.asm#L45

I don't know how far the work on non-master platforms has progresses.

Jonathan, it would be good to know what your plans are for this work.

Dave

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby dixiestoat » Sun Apr 30, 2017 6:57 am

Dave, will it be available for viewing and playing with at Cambridge..? [-o< [-o<
If in doubt, CTRL-BREAK thou should clout..

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Sun Apr 30, 2017 7:05 am

dixiestoat wrote:Dave, will it be available for viewing and playing with at Cambridge..? [-o< [-o<
There will be a prototype, for sure - and should be working!

I've had more ideas, this morning, which I'll write-up when I've thought them through . . .

Dave H :D
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby hoglet » Sun Apr 30, 2017 7:11 am

The current (untested) CPLD design for the AP5 is waiting here:
https://github.com/hoglet67/ElectronAP5 ... ronAP5.vhd

Bonus points to anyone that spots the inevitable mistakes!

Dave

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Sun Apr 30, 2017 9:02 am

OK, here's what I think we can do with the Memory, with the current board design . . .
Option 1.png
Option 2.png
Option 3.png

Which would give up to 36K of space for ADFS :D

Dave H :D
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby rharper » Sun Apr 30, 2017 11:05 am

Put me down for 2 built please.
I can't have just one the other Elk would complain, they're so fussy :!:
I can already hear the third in storage moaning :cry:
Ray :D
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elk Towers » Sun Apr 30, 2017 5:43 pm

I would like a built one please
Nick

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Thu May 04, 2017 8:02 pm

How will ROM 13 work? You mention 'Ability to link-out ROM 13 <- In case another interface need this slot.' If I 'disable' AP5 using 13 do I lose any featuers?

Problem with ROM 13 is Electron GoSDC uses that. And if you change it to use the cartridge slot you lose both Rom slots in that Cartridge (as it disabled the SRAM).

I am actually struggling to get GoSDC to run unless I stop using ROM 13 on the new AP6 anyay, jumper 1&4 open, need to check no shorts I guess.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Thu May 04, 2017 10:22 pm

Elminster wrote:How will ROM 13 work? You mention 'Ability to link-out ROM 13 <- In case another interface need this slot.' If I 'disable' AP5 using 13 do I lose any featuers?
OK, if you look at the available add-ons and plug-in cartridges that are available you will see a number of them have a socket for ROM 13 e.g. AP6 and the cartridge version of GoSDC and I'm sure there are others. As you can only have 1 socket mapped to ROM 13 you need to be able disable the ROM 13 sockets in other units. I alway add such a link, on my units where I have a ROM 13, so you can use other accessories without conflict.

Elminster wrote:Problem with ROM 13 is Electron GoSDC uses that. And if you change it to use the cartridge slot you lose both Rom slots in that Cartridge (as it disabled the SRAM).
Yes, that is an issue - It's a shame John didn't 'split' the RAM so that GoSDC could be used purely in the lower numbered sockets.

Elminster wrote:I am actually struggling to get GoSDC to run unless I stop using ROM 13 on the new AP6 anyay, jumper 1&4 open, need to check no shorts I guess.
If you're using GoSDC fitted into one of John Kortink's Cartridge boards (?) then you WILL have to disable the ROM 13 in AP6.
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Fri May 05, 2017 12:33 am

daveejhitchins wrote:
Elminster wrote:I am actually struggling to get GoSDC to run unless I stop using ROM 13 on the new AP6 anyay, jumper 1&4 open, need to check no shorts I guess.


If you're using GoSDC fitted into one of John Kortink's Cartridge boards (?) then you WILL have to disable the ROM 13 in AP6.


Ah I see, I have my logic backwards, thought I had to enable it to make it work. Was going to try disabling it, but never got around to trying. Job 1 for tomorrow. Thanks.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby hoglet » Thu Jun 01, 2017 10:55 am

(continued from here)
daveejhitchins wrote:Talking about AP5 - Poor Dave (hoglet) has been through the mill with this one. I'm hoping he'll do a post detailing the problems and fixes. It should be interesting!!

Come on guys, there's only been 15 versions of the CPLD so far: :shock:
https://github.com/hoglet67/ElectronAP5 ... r/releases

To be fair, we have been adding plenty of new features, so this is not only bug fixes.

And just to be clear, this has certainly not been a chore! I do really enjoy stuff like this!

The main challenge to date has been electrical noise as data bus buffers (e.g. for the tube) switch on and off messing up the clocks.

Here's where we started with (version 0_56 I think). The trace at the top is Phi0 as seen on the Tube interface.
IMG_0921.JPG

It turns turns out that PiTubeDirect is very tolerant of clocks like this, but the Matchbox certainly is not!

There were a number of reasons why this is so bad:
- The ground on the AP5 is fed through two sets of edge connectors
- We initially used 74HCT245 buffers, which turn on much faster than 74LS245 buffers
- On Issue 4 Electrons Phi0 is unbuffered (i.e. directly from the ULA), so has an awfully slow rising edge
- On Issue 4 Electrons a bug in the ULA causes the ROM to be enabled briefly when pages &FC, &FD and &FE are accesses. If the I/O device is sufficiently fast (as the AP5 initially was), you get a bus conflict.

The first attempt at a fix was to gate the tube data bus buffer select with Phi0, so it's only enabled during the second half of Phi0. This made a big improvement:
IMG_0927.JPG

But there is still enough of a glitch on Phi0 to occasionally mess up the Matchbox. In my case it worked when plugged in directly, but not when on a extension cable.

The second attempt at a fix was to regenerate Phi0 in the CPLD. This was not just a case of buffering it through the CPLD, because that would actually just amplifed the glitch. Instead, we have a small state machine that regenerates a clean Phi2-like clock from the 16MHz clock, by looking for a falling edge of Phi0 that's preceded by at least two cycles of high:
https://github.com/hoglet67/ElectronAP5 ... 5.vhd#L120

The resulting clock is much cleaner:
IMG_0928.JPG

and tracks Phi0 being extended very nicely:
IMG_0930.JPG

With this version the Matchbox Co Pro is working very reliably, even on an overly long cable.

On the feature front, we've gradually been adding more flexibility in the way the two ROM sockets work, and the type of devices they support. Specifically, we now have four main modes:

Code: Select all

    -- Jumpers:                      ROM socket 0:      ROM Socket 1:
    --
    -- 11 - normal/32KB    Device:   256Kb ROM/RAM      256Kb ROM/RAM
    --                     Slot 0 A: 0000-3FFF                    (bank 0)
    --                     Slot 0 B: 4000-7FFF                    (bank 1)
    --                     Slot 1 A:                    0000-3FFF (bank 0)
    --                     Slot 1 B:                    4000-7FFF (bank 1)
    --
    -- 10 - normal/64KB    Device:   empty              256Kb ROM   512Kb ROM
    --                     Slot 0 A:                    0000-3FFF   4000-7FFF (bank 0)
    --                     Slot 0 B:                    (unmapped)  0000-3FFF (bank 1)
    --                     Slot 1 A:                    4000-7FFF   C000-FFFF (bank 0)
    --                     Slot 1 B:                    (unmapped)  8000-BFFF (bank 1)
    --
    -- 01 - MMFS/32-64KB   Device:   128Kb RAM          256Kb ROM   512Kb ROM
    --                     Slot 0 A: 3600-3FFF          0000-35FF   4000-75FF (bank 0)
    --                     Slot 0 B: 3600-3FFF          (unmapped)  0000-35FF (bank 1)
    --                     Slot 1 A:                    4000-7FFF   C000-FFFF (bank 0)
    --                     Slot 1 B:                    (unmapped)  8000-BFFF (bank 1)
    --
    -- 00 - ADFS/32-64KB   Device:   128Kb RAM          256Kb ROM   512Kb ROM
    --                     Slot 0 A: 3000-3FFF          0000-3FFF   4000-6FFF (bank 0)
    --                     Slot 0 B: 3000-3FFF          (unmapped)  0000-2FFF (bank 1)
    --                     Slot 1 A:                    4000-7FFF   C000-FFFF (bank 0)
    --                     Slot 1 B:                    (unmapped)  8000-BFFF (bank 1)
 

All of the modes support bank switching, if a suitably large device is fitted. The current mechanism for banks switching is three successive writes to &AFFF. This should make it very resilient to accidental bank switching in normal use.

There are also a couple of modes that are more specialised, which overlay RAM at the end of the ROM. One is tuned to the needs of MMFS and overlays 2.5KB of RAM. This other is for a future version of ADFS and overlays 4KB of RAM.

The normal modes are designed for maximum compatibility with a wide range of devices: 27C128, 28C256, 62256, 27C512. A 27C256 could be used as well, but will only function as a 27C128 because it's A14 is on a different pin.

There are software controlled write locks for each of the sockets, and lock disable jumpers for Sockets 0/2 and 1/3 (but not for Socket 13).

Once Daniel and Dave have had a chance to update to the latest CPLD and do some more testing, I think we're in good shape for the the production board.

The latest CPLD is in github:
https://github.com/hoglet67/ElectronAP5 ... ronAP5.vhd

I'm happy to take questions if anyone has any!

Dave
Last edited by hoglet on Thu Jun 01, 2017 12:53 pm, edited 1 time in total.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Thu Jun 01, 2017 12:41 pm

Thanks for the update. My only question is how on earth do you find time to do everything you do!!?

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby hoglet » Thu Jun 01, 2017 12:54 pm

Elminster wrote:Thanks for the update. My only question is how on earth do you find time to do everything you do!!?

A combination of early retirement, no kids and an understanding wife!

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Thu Jun 01, 2017 4:20 pm

hoglet wrote:
Elminster wrote:Thanks for the update. My only question is how on earth do you find time to do everything you do!!?

A combination of early retirement, no kids and an understanding wife!


Ah that explains it. I fail on all those counts.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby ssgoodwin » Sun Jun 11, 2017 9:19 pm

Hi
Could I be added to the list please, I would like a built version once available.
Thanks in advance.
Scott

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby marcusjambler » Mon Jun 12, 2017 10:55 am

Hi

Please add me to the list for a built board.

Marcus

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Mon Jun 12, 2017 1:12 pm

Scott and Marcus, both added to the list -

Thanks- Dave H :D
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Wed Jun 14, 2017 10:42 am

Probably asked before but might be worth reiterating now you are getting close. Do you have a good idea of cost now at least for the kit as you must know the BOM (Edit: I get approx kit cost with prefitting of Surface mount), forget if it has those horrid surface mounts on it (Edit: looks like it has a horrid surface mount). Just I want to make sure I start saving my 1p/2ps so I have enough.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Wed Jun 14, 2017 11:36 am

I do hav a BoM and a price . . . I'll get on to it as soon as I get home - currently sat under the Spiniker Tower, in the SUN :D

I'm hoping to get a price for a painted metal case too! Aiming for £10 or less! [-o<

Kits will have the CPLD fitted and programmed (unless requested not to).

Dave H :D
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Wed Jun 14, 2017 12:44 pm

Great thanks.

Do you paint the case yourself in Hammerrite?

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby danielj » Wed Jun 14, 2017 1:24 pm

Personally I use poster-paints.

d.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby aerworuld » Thu Jun 15, 2017 5:24 pm

Hi Dave, not sure if i'm still on the list for one of these beauties; i haven't been on much of late ;-) If not, please could you put me down for one built once they're complete? (Cased, if that does become an option)

Excellent work sir; the Elk continues to love you greatly, all these years on ;-)

Stuart.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Fri Jun 16, 2017 7:59 am

Elminster wrote:Great thanks.

Do you paint the case yourself in Hammerrite?
I'll have them painted as the original, with the correct colour (hopefully) and the powder paint finish.

Dave H :D
Parts: UM6502CE, GAL22V10D, GAL16V8D, AS6C62256A, TC514400AZ, WD1772, R6522, TMS27C512, AT28C256
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Fri Jun 16, 2017 8:02 am

aerworuld wrote:Hi Dave, not sure if i'm still on the list for one of these beauties; i haven't been on much of late ;-) If not, please could you put me down for one built once they're complete? (Cased, if that does become an option)
You're still on the list, Stuart :D
aerworuld wrote:Excellent work sir; the Elk continues to love you greatly, all these years on ;-)
Thanks - appreciated :D

Dave H :D
Parts: UM6502CE, GAL22V10D, GAL16V8D, AS6C62256A, TC514400AZ, WD1772, R6522, TMS27C512, AT28C256
Products: ARA II, ABR, ATI, AP6, MGC, AP5 . . .
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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Fri Jun 16, 2017 9:35 am

daveejhitchins wrote:
Elminster wrote:Great thanks.

Do you paint the case yourself in Hammerrite?
I'll have them painted as the original, with the correct colour (hopefully) and the powder paint finish.

Dave H :D


I think you need to offer a custom paint job service. I could have a big red Eye on mine.

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby Elminster » Fri Jun 16, 2017 9:36 am

daveejhitchins wrote:
aerworuld wrote:Hi Dave, not sure if i'm still on the list for one of these beauties; i haven't been on much of late ;-) If not, please could you put me down for one built once they're complete? (Cased, if that does become an option)
You're still on the list, Stuart :D
aerworuld wrote:Excellent work sir; the Elk continues to love you greatly, all these years on ;-)
Thanks - appreciated :D

Dave H :D


I jus ask to be added to the list once a month just to make sure. :evil:

I will probably end up with 20 of them, and will then have to go collect more Electrons & +1s from ebay

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby daveejhitchins » Sat Jun 17, 2017 5:33 am

I now have a good idea of the AP5 price, as follows:

Kit, no case, = £23.00 -- This will have the CPLD fitted and programmed, unless you specify that you'd like to do this yourself, saving you £2.00 . . .
Built, no case, = £31.00

Case price to follow . . .

Dave H :D
Parts: UM6502CE, GAL22V10D, GAL16V8D, AS6C62256A, TC514400AZ, WD1772, R6522, TMS27C512, AT28C256
Products: ARA II, ABR, ATI, AP6, MGC, AP5 . . .
For a price list, contact me at: Retro Hardware AT dave ej hitchins DOT plus DOT com

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby aerworuld » Sat Jun 17, 2017 5:59 am

daveejhitchins wrote:I now have a good idea of the AP5 price, as follows:

Kit, no case, = £23.00 -- This will have the CPLD fitted and programmed, unless you specify that you'd like to do this yourself, saving you £2.00 . . .
Built, no case, = £31.00

Case price to follow . . .

Dave H :D


8) 8) =D>

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Re: P.R.E.S. AP5 - Original and Re-Design

Postby paradroid90 » Sat Jun 17, 2017 8:07 am

Great News Dave :-) Looking forward to getting my hands on one of these :-)
6502 Junkie :-)


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