6809 experiments

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hoglet
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Re: 6809 experiments

Postby hoglet » Wed Oct 18, 2017 4:01 pm

dominicbeesley wrote:I've ordered that spartan board, I couldn't find much documentation about how the level shifter board works or how to map the pins onto that Spartan Board....no doubt I'll be back with questions when the parts arrive....

I don't think Jason ever posted the schematics.

Probably the best starting point is one of the existing .ucf files:
https://github.com/hoglet67/AtomBusMon/ ... /board.ucf
dominicbeesley wrote:Is there something Xilinx specific or would it just be the usual faff of setting up the project in Quartus instead of Xise?

It's mostly just the usual faff.

There is one large 512x72 FIFO (called WatchEvents) that was created using the Xilinx Core Gen tool, so that all that would need to be replaced.

The tool chain is a bit more complicated than a pure FPGA because the design includes a support processor (a soft AVR) whose C code needs to be compiled and converted to block RAM initialization data. I built a set of makefiles to do the C compile, the Xilinx compile, and then link everything together. It would be quite fiddly to add Altera into the mix, but possible if there was some interest.

Beeb FPGA actually embeds ICE T65 (with a pre-compiled version of the C code) in the Altera DE1 build, so it has been built on Altera. So all the bits exist.

I don't have a DE0 Nano myself, so it would be a bit hard for me to test this.

Dave

dominicbeesley
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Re: 6809 experiments

Postby dominicbeesley » Wed Oct 18, 2017 10:36 pm

Thanks Dave,

I wouldn't expect you to do any porting. I'll have a look when it all comes - I have a plan for an add on for the BBC that would plug into the CPU socket and this might be the way to do it, or at least to test the principle. I was thinking of the DE0 just for the on-board memory but I could probably make do with the block RAM on the Spartan 6.

I've ordered the board you recommended, I think I get the GODIL problem now, all the ones on offer are the DIL rather than DIP ones or am I missing something?

D

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hoglet
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Location: Bristol

Re: 6809 experiments

Postby hoglet » Thu Oct 19, 2017 7:19 am

dominicbeesley wrote:I've ordered the board you recommended, I think I get the GODIL problem now, all the ones on offer are the DIL rather than DIP ones or am I missing something?

Yes exactly, the only remaining stocks have 2x female DIL headers on the bottom, not the 40-pin DIP male header.

I don't think any more are being made.

Dave

dominicbeesley
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Re: 6809 experiments

Postby dominicbeesley » Thu Oct 26, 2017 1:56 pm

Straying slightly OT into VHDL, I'm trying to model the Mk.2 board before I commit to fabrication. I've swapped over to using TI 74CB3T6211 bidirectional level shifters instead of 74XX4245s. I'm not clear how to model them in VHDL. The naive 1st cut (delays not implemented yet) seems to work but I'm not sure it shouldn't be more nuanced for the situation where both A/B ports are being driven?

I tried to add check for both ports driven or either port=X giving X but that latched into X and stayed there!

This doesn't need to be synthesizable just to help me test out timing/sanity of my MEMC / VIDC ideas (and the general system busses). I've used a SYS09 core for the CPU and it will run code and exercise the MEMC and VIDC chips...

Any advice welcome!

Code: Select all

entity LEVELS is
   Generic (
      tprop         : time   := 1 ns;
      toe         : time   := 4 ns
   );
   Port (
      A            : inout   STD_LOGIC_VECTOR(7 downto 0);
      B            : inout   STD_LOGIC_VECTOR(7 downto 0)
   );
end LEVELS;

architecture Behavioral of LEVELS is
      
begin

      p_a2b: process (A)
      begin
         for i in A'low to A'high loop
            if A(i) = '0' then
               B(i) <= '0';
            else
               B(i) <= 'H';
            end if;
         end loop;
      end process;

      p_b2a: process (B)
      begin
         for i in B'low to B'high loop
            if B(i) = '0' then
               A(i) <= '0';
            else
               A(i) <= 'H';
            end if;
         end loop;
      end process;
   
   
end Behavioral;

gtoal
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Joined: Sat Nov 04, 2017 2:07 am

Re: 6809 experiments

Postby gtoal » Sat Nov 04, 2017 7:03 am

I just found this forum and thought I should drop in and say hello. I built a 6809 [url="http://mdfs.net/Software/Tube/6809/Toal/CoPro2.htm"]second processor[/url] back when I worked at Acorn (and found it again a couple of days ago when tidying up my garden shed).

Anyway I noticed a comment on the lack of 6809 programmers nowadays, so I thought I should let you know that there's actually quite an active 6809 community still around, writing code for the Vectrex vector-based gaming console from the 80's.

We hang out at http://vectorgaming.proboards.com and http://atariage.com/forums/forum/182-vectrex/ - there are also some Coco coders around somewhere...

There are two usable (with a little effort) free C compilers for the 6809: [url="http://perso.b2b2c.ca/~sarrazip/dev/cmoc.html"]CMOC[/url] and [url="http://vide.malban.de"]GCC[/url] - the latter comes packaged with an IDE called "Vide". And with a little searching there are lots of 6809 programming books still to be found on the net.


Graham

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daveejhitchins
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Re: 6809 experiments

Postby daveejhitchins » Sat Nov 04, 2017 10:25 am

Welcome to the Forum, Graham . . . Enjoy . . .

Any stories from your time with Acorn? Love to hear them :D

Dave H :D
Parts: UM6502CE, GAL22V10D, GAL16V8D, AS6C62256A, TC514400AZ, WD1772, R6522, TMS27C512, AT28C256
Products: ARA II, ABR, ATI, AP6, MGC, AP5 . . .
For a price list, contact me at: Retro Hardware AT dave ej hitchins DOT plus DOT com

gtoal
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Re: 6809 experiments

Postby gtoal » Sat Nov 04, 2017 9:55 pm

daveejhitchins wrote:Welcome to the Forum, Graham . . . Enjoy . . .

Any stories from your time with Acorn? Love to hear them :D


Perhaps in another thread on another day. And most of the best Acorn stories are not repeatable in public ;-)

G

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jgharston
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Location: Whitby/Sheffield

Re: 6809 experiments

Postby jgharston » Sat Nov 04, 2017 11:47 pm

gtoal wrote:Perhaps in another thread on another day. And most of the best Acorn stories are not repeatable in public ;-)

Is it safe yet to recount my experiences at Watford Electronics? ;)

Most of my time at AFE Hong Kong, however, is entirely repeatable. I wish I'd taken photos as everything's in my head.

Code: Select all

$ bbcbasic
PDP11 BBC BASIC IV Version 0.25
(C) Copyright J.G.Harston 1989,2005-2015
>_

crj
Posts: 320
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Re: 6809 experiments

Postby crj » Sun Nov 05, 2017 4:30 am

Wow, and there's a blast from the past!

gtoal wrote:Perhaps in another thread on another day. And most of the best Acorn stories are not repeatable in public ;-)

I heard about the taxi; tell them about the taxi!

dominicbeesley
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Re: 6809 experiments

Postby dominicbeesley » Sun Nov 05, 2017 5:37 pm

Thanks Graham,

I'll look around at the Vectrex forum, I will also see if I can track down any active Coco programmers at some point.

I'm sure Any stories you, or JGH have would be received with interest!

D

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myelin
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Re: 6809 experiments

Postby myelin » Tue Nov 28, 2017 12:55 am

hoglet wrote:Yes exactly, the only remaining stocks have 2x female DIL headers on the bottom, not the 40-pin DIP male header.

I don't think any more are being made.


Time for us to make our own miniature FPGA board perhaps?

The XC6SLX9-2CSG225 is 13x13mm, which will (just) fit between two rows of 15.24mm pins. Also requires config flash, 1.2V power, and level shifting, so it's going to be tight, but probably in line with the original GODIL.
SW/EE from New Zealand, now in San Francisco: http://myelin.nz/
Having fun making hardware projects for the Electron!
So far: 32k flash cart, USB cart interface, 3-cart expansion, Elk PiTubeDirect. Later: Dual ported ram cart.

crj
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Re: 6809 experiments

Postby crj » Tue Nov 28, 2017 1:36 am

The Preci-dip 350-80-1nn-01-899101 header looks extremely interesting: it mounts via large surface-mount pads instead of through-hole, which means you have some extra space on the other side of the board.

Meanwhile, the Altera Max 10 FPGA range in 169-pin UBGA is 11mm * 11mm, small enough to fit between the rows of pins in a 0.6" DIL package. It runs from a single 3.3V supply and has integrated flash with a startup time in the low milliseconds.

How do I know this? Well... it's possible we should be avoiding duplication of effort!

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myelin
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Re: 6809 experiments

Postby myelin » Tue Nov 28, 2017 1:49 am

crj wrote:How do I know this? Well... it's possible we should be avoiding duplication of effort!


Excellent... I'll stop thinking about this one and concentrate on finishing the six or so things I'm already pottering around on!
SW/EE from New Zealand, now in San Francisco: http://myelin.nz/
Having fun making hardware projects for the Electron!
So far: 32k flash cart, USB cart interface, 3-cart expansion, Elk PiTubeDirect. Later: Dual ported ram cart.


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